Programming method of FPGA accelerator card onboard flash and related components

Abstract

The invention discloses an FPGA accelerator card onboard flash programming method, system and device and a readable storage medium, which are applied to a host end. The method comprises the followingsteps: transmitting firmware data to a DDR chip; transmitting the DDR address and the length of the firmware data to a flash controller, and then sending a programming burning to the flash controller,so that the flash controller carries the firmware data from the DDR chip to the flash chip according to the DDR address and the length; and acquiring state information about whether the firmware datais programmed successfully or not through the flash controller. According to the invention, the temporary storage of firmware data is achieved through the DDR chip, the waste of FPGA chip resources when a buffer area is located in the FPGA chip in the prior art is avoided, the data can be carried in a DMA mode based on the characteristics of the DDR chip, and the efficiency of flash programming operation is improved.

Description

technical field [0001] The invention relates to the application field of boards, in particular to a programming method and related components for onboard flash of an FPGA accelerator card. Background technique [0002] Currently, FPGA (Field-Programmable Gate Array, Field Programmable Gate Array) is usually installed in the slot of the data center server in the form of PCIe (Peripheral Component Interconnect express, bus and interface standard) board as an external device and used by the system. In addition to the FPGA chip that provides computing power, the board also includes a DDR (Double Data Rate, double-rate synchronous dynamic random access memory) for storing data and a flash chip for storing initial firmware. The initial firmware in the Flash chip is used to configure the FPGA chip when the board is powered on, so that the server BIOS (Basic Input Output System, Basic Input Output System) scans and recognizes the PCIe device equipped with the FPGA chip. [0003] Ev...

AI Technical Summary

Problems solved by technology

However, since the buffer takes up FPGA chip resources, if the buffer is set larger, flash programming operations are not very frequent, resulting in a waste of FPGA resources; if the buffer is set smaller, data needs to be written multiple times, and cannot (Direct Memory Access, direct memory access) to transfer data, resulting in longer flash programming time

Images