Time domain interleaved ADC multi-phase clock generation circuit

Abstract

The invention discloses a time domain interleaved ADC multi-phase clock generation circuit comprising a signal conversion module used for generating first, second, third and fourth output signals according to first and second input signals; a first frequency division module and a second frequency division module used for carrying out frequency division processing on the first output signal, the second output signal, the third output signal and the fourth output signal to obtain a first frequency division signal and a second frequency division signal; a signal coupling module used for carryingout mutual coupling processing on the first frequency division signal and the second frequency division signal to obtain a frequency division coupling signal; a multi-channel clock signal module usedfor carrying out signal processing on the frequency division coupling signal according to a preset signal processing rule to obtain a multi-channel clock signal; and a driving circuit module used forcorrecting the multi-channel clock signal to obtain a final multi-phase clock signal. According to the invention, the output ends of the first frequency division module and the second frequency division module are subjected to mutual coupling processing, so that the continuity of frequency division signals is enhanced, and the sequential relationship between the signals is better.

Description

technical field [0001] The invention belongs to the technical field of ADC analog-to-digital converters, and in particular relates to a time-domain interleaved ADC multiphase clock generation circuit. Background technique [0002] The high speed and high precision of an analog-to-digital converter (Analog-to-Digital Converter, referred to as ADC) has always been the relentless pursuit of people. As a bridge between analog circuits and digital circuits, analog-to-digital converters have been facing many challenges in performance improvement. In the field of high-speed signal processing, factors such as technology have greatly limited the conversion rate of the analog-to-digital converter. [0003] In recent years, with the development of the field of analog-to-digital converters, the demand for clock sampling frequency of analog-to-digital converters has become higher and higher. It is difficult to improve the clock frequency of single-channel analog-to-digital converters ac...

AI Technical Summary

Problems solved by technology

[0004] However, single-channel analog-to-digital converters are widely used at present, while multi-channel analog-to-digital converters have complex structure and circuit design, and there are timing continuity problems between signals, resulting in poor flexibility in clock duty cycle and high-level overlap control

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