Read-write operation method of SRAM unit

Abstract

The invention discloses a read-write operation method of an SRAM (Static Random Access Memory) unit, which can reduce the driving capacity of a pull-up PMOS (P-channel Metal Oxide Semiconductor) tubeon one side when performing write operation on a data latch, and is more beneficial to the completion of the write operation.

Description

technical field [0001] The invention relates to a reading and writing operation method of an SRAM unit. Background technique [0002] The storage unit (that is, the SRAM unit) is the most basic and important component of the SRAM memory, occupying most of the entire SRAM memory area. [0003] An SRAM cell generally includes a data latch including a first storage node and a second storage node that store data inverses. If the first storage node is at low level and the second storage node is at high level, 0 is stored in the data latch; if the first storage node is at high level and the second storage node is at low level, then A 1 is stored in the data latch. [0004] In the existing SRAM unit, when the write operation is performed on the data latch, if the driving capability of the pull-up PMOS transistor on one side can be reduced, it will be more conducive to the completion of the write operation. [0005] And the existing SRAM unit needs the assistance of the bit line ...

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Problems solved by technology

[0005] And the existing SRAM unit needs the assistance of the bit line when the data latch is written, and when the data latch is read, it also needs to output data through the bit line, so the design related to the bit line Both write and read operations need to be considered, which increases the complexity and design difficulty of SRAM cells

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