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Memory chip, test circuit and test method thereof

A technology of memory chips and test circuits, applied in static memory, instruments, etc., can solve the problems of high production cost and inconvenient chip miniaturization design, and achieve the effect of reducing production cost, facilitating miniaturization design, and reducing size

Active Publication Date: 2022-04-19
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] In the prior art, it is generally necessary to add an additional test circuit to the chip structure of the memory chip, which leads to high production costs and is not convenient for chip miniaturization design.

Method used

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  • Memory chip, test circuit and test method thereof
  • Memory chip, test circuit and test method thereof
  • Memory chip, test circuit and test method thereof

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Embodiment Construction

[0047] The following will clearly and completely describe the embodiments of the present application with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

[0048] In order to make the above objects, features and advantages of the present application more obvious and comprehensible, the present application will be further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0049] Since the 3D NAND memory chip is mainly composed of an array, and the storage capacity depends on the area of ​​the array, in order to reduce the cost of the chip, it is necessary to compress th...

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Abstract

The invention discloses a storage chip, its testing circuit and testing method. The microprocessor of the multiplexing storage chip is used as the controller of the testing circuit in the storage chip, and the page buffer of the multiplexing storage chip is used as the comparison circuit of the testing circuit. It is necessary to add a test vector generation circuit in the memory chip to realize the built-in self-test circuit in the memory chip. Compared with the traditional scheme of separately adding a controller, a comparison circuit and a test vector generation circuit, the size of the test circuit is greatly reduced. It facilitates the miniaturization design of the memory chip and reduces the production cost.

Description

technical field [0001] The invention relates to the technical field of memory chips, and more specifically, to a memory chip, a test circuit and a test method thereof. Background technique [0002] With the continuous development of science and technology, more and more electronic devices are widely used in people's daily life and work, which brings great convenience to people's daily life and work, and has become an indispensable and important tool for people today. tool. [0003] Electronic devices need to store data through memory chips. As the performance of electronic equipment becomes more and more powerful, more and more data needs to be stored and processed. In order to ensure the safe and reliable operation of electronic equipment, electronic equipment needs to integrate a test circuit inside the memory chip to detect whether the memory chip is faulty. . [0004] In the prior art, it is generally necessary to add an additional test circuit to the chip structure o...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/18G11C29/56
CPCG11C29/18G11C29/56
Inventor 王颀张桔萍刘飞霍宗亮
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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