FPGA version loading method and device and storage medium

A version and basic version of the technology, applied in the computer field, can solve problems such as the inability to load the FPGA chip device, the disconnection of the FPGA and the PCIE bus link status, etc.

Active Publication Date: 2020-06-26
HANGZHOU DPTECH TECH
View PDF9 Cites 1 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, after the hardware is powered on, due to the uncontrollable hardware timing, there may be a time when the hardware reset pin is pulled up after the BIOS scans the PCIE device global

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • FPGA version loading method and device and storage medium
  • FPGA version loading method and device and storage medium
  • FPGA version loading method and device and storage medium

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0032] Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numerals in different drawings refer to the same or similar elements unless otherwise indicated. The implementations described in the following exemplary examples do not represent all implementations consistent with the present disclosure. Rather, they are merely examples of apparatuses and methods consistent with aspects of the present disclosure as recited in the appended claims.

[0033] The terminology used in the present disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of the present disclosure. As used in this disclosure and the appended claims, the singular forms "a", "said" and "the" are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be unders...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention provides an FPGA version loading method and device and a storage medium. The method comprises the steps: configuring a first pin and a second pin on a specified chip connected with a central processing unit into a mode that an output signal is valid after a kernel system is started; adjusting the output levels of the first pin and the second pin; and controlling a third pin and a fourth pin respectively corresponding to the first pin and the second pin on the FPGA chip equipment to work, after the FPGA basic version is loaded, enabling a high-speed serial computer extension bus standard PCIE link between the FPGA chip device and the central processing unit to be in a connected state; after the PCIE link is in a connected state, detecting whether the FPGA chip equipment existsin the kernel system or not, and obtaining a detection result; and at least executing a scanning operation of re-scanning the FPGA chip device according to the detection result. According to the method and the device, the stability of loading the FPGA version through the PCIE bus is improved.

Description

technical field [0001] The present disclosure relates to the computer field, and in particular to a method and device for loading an FPGA version, and a storage medium. Background technique [0002] At present, FPGA (Field Programmable Gate Array, Field Programmable Gate Array) chips are more and more widely used in high-end network security equipment, and can replace switching chips and Phy (Physical, physical layer) chips to realize the sending and receiving of network messages on the panel port . FPGA needs to have a version configuration file adapted to the FPGA chip device to start working, and the version loading method becomes the first step to make the chip work. [0003] After the device is powered on, the hardware resets the FPGA, the BIOS (Basic Input Output System, basic input and output system) scans the entire PCIE (Peripheral Component Interconnect Express, high-speed serial computer expansion bus standard), initializes and configures the PCIE device After t...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): G06F9/4401G06F13/42
CPCG06F9/4401G06F13/4282G06F2213/0026
Inventor 王晨任红军
Owner HANGZHOU DPTECH TECH
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap