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Source synchronization circuit of data transmission interface

A data transmission interface, source synchronization technology, applied in the field of data transmission, can solve the problem that the clock channel or the synchronization channel cannot meet the data synchronization and other problems

Pending Publication Date: 2020-07-07
GALAXYCORE SHANGHAI
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  • Description
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  • Application Information

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Problems solved by technology

[0003] In traditional source synchronous interface circuits, when there are multiple data channels, one clock channel or synchronous channel cannot satisfy all data synchronization

Method used

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  • Source synchronization circuit of data transmission interface
  • Source synchronization circuit of data transmission interface
  • Source synchronization circuit of data transmission interface

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Embodiment Construction

[0027] In order to make the above objects, features and advantages of the present invention more comprehensible, specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0028] The present invention provides a source synchronous circuit of a data transmission interface, configured in the interface connection between a dynamic random access memory and a system on chip, including: an arbitration module and a delay module; the arbitration module is suitable for receiving at least two original synchronization signals , by judging the sequence and time difference of the original synchronization signals, generating a control signal to control the delay of the delay module; delaying the original synchronization signals through the delay module, making at least 2 synchronization signals into 2N or 2N-1 change synchronization signals, N is a natural number greater than or equal to 2. A plurality of data signals are...

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Abstract

The invention provides a source synchronization circuit of a data transmission interface, which is configured in interface connection between a dynamic random access memory and a system-on-chip. The source synchronization circuit comprises an arbitration module and a delay module; the arbitration module is suitable for receiving at least two original synchronization signals, and generating a control signal to control the delay of the delay module by judging the sequence and the time difference of the original synchronization signals; and the original synchronization signals are delayed throughthe delay module, so that the at least two synchronization signals are changed into 2N or 2N-1 changed synchronization signals, and N is a natural number greater than or equal to 2.

Description

technical field [0001] The invention relates to the field of data transmission, in particular to a source synchronous circuit of a data transmission interface. Background technique [0002] With the development of technology, the speed of data transmission is getting faster and faster. In order to meet various complex applications, the data throughput is getting bigger and bigger. The first thing to bear the brunt is the increase of frequency and the number of interfaces. A commonly used method is a source synchronous interface, that is, when the sender sends data, it also sends a clock signal or a synchronization signal. [0003] In traditional source synchronous interface circuits, when there are multiple data channels, one clock channel or synchronous channel cannot satisfy all data synchronization. The usual way is to add a clock channel or a synchronization channel. The more common way is that every 8 data or 16 data or even more data will share a synchronization signa...

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Application Information

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IPC IPC(8): G06F13/16
CPCG06F13/1689
Inventor 黄泽俞大立李怀兆
Owner GALAXYCORE SHANGHAI
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