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A td-lte system clock synchronization method based on a general platform

A general-purpose platform and system clock technology, applied in time-division multiplexing systems, multiplexing communications, electrical components, etc., can solve problems such as complex operations, reduced performance of computing platforms, and no consideration of the capabilities of different computing platforms. Achieving the effect of low cost and reduced complexity

Active Publication Date: 2022-03-11
HEBEI FAREAST COMM SYST ENG
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] At present, in order to ensure the clock synchronization of the networking system, many literatures do time synchronization at the beginning of the centralized start-up and then correct the time deviation as time goes by. The operation is complicated and does not consider the capabilities of different computing platforms, thereby reducing the The performance of the computing platform

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  • A td-lte system clock synchronization method based on a general platform
  • A td-lte system clock synchronization method based on a general platform

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Embodiment Construction

[0023] The present invention will be described in further detail below in conjunction with the accompanying drawings.

[0024] A TD-LTE system clock synchronization method based on a common platform, the method is realized based on the common platform in the prior art, and the common platform includes internal modules such as CPU, DSP, CPRI and the like. The clock input of the general platform is PP2S signal when it works normally. This signal is provided by the clock chip PPS signal connected to the peripheral FPGA frequency multiplication GPS / 1588 module. At the same time, FPGA also provides 10ms timing signal to the general platform to ensure that the general platform CPRI normal operation of the module.

[0025] The method includes the following steps:

[0026] (1) During the start-up process of the base station, the CPU in the general platform sends the PP2Smod256 value (1 byte) to the DSP part of the general platform after 1 second after receiving the PP2S signal.

[0...

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Abstract

The invention discloses a TD-LTE system clock synchronization method based on a general platform, and belongs to the technical field of wireless communication. The invention is based on a general computing platform, uses the PPS signal provided by GPS / 1588 to calculate the CPRI DMA enabling time, and then uses the 10ms timing of CPRI to ensure the 10ms wireless frame signal processing of the TD-LTE system. The method effectively utilizes the module performance of the general computing platform, reduces the complexity of clock synchronization, and has low cost.

Description

technical field [0001] The invention belongs to the technical field of wireless communication, in particular to a TD-LTE system clock synchronization method based on a general platform. Background technique [0002] The TD-LTE system is a time-division system, and the information interaction between the terminal and the base station is based on a strict time beat to complete the normal transmission of uplink and downlink signals. Therefore, when the TD-LTE system is networked, all base stations must keep the system clock synchronized, so as to ensure that the terminal can switch normally within the signal coverage of each base station, and avoid link interference caused by time asynchronization, which will cause the terminal to go offline and then cause business interruption. [0003] In order to ensure clock synchronization during TD-LTE system networking, reference signals such as GPS / 1588 are usually used, and the same reference signal is used to ensure its own clock syn...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04J3/06
CPCH04J3/0638
Inventor 付楠楠康志杰张松轶孙敬伟刘玮辛利万翔范林涛司雷刘东
Owner HEBEI FAREAST COMM SYST ENG