FPGA device for realizing on-chip network transmission bandwidth expansion function

A transmission bandwidth and on-chip network technology, applied in the field of FPGA, can solve the problems of limited transmission bandwidth and computing efficiency, difficult working effect, chip structure limitation, etc., and achieve the effect of increasing and expanding the transmission bandwidth

Active Publication Date: 2020-10-16
WUXI ESIONTECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the stage where machine learning algorithms are still being iteratively optimized, FPGAs have unique advantages in the field of artificial intelligence due to their programmability and powerful vector computing capabilities. The FPGA field is also optimizing the FPGA architecture and adding dedicated Artificial intelligence engine, so now there are some ways to design and integrate a dedicated AI module inside the FPGA die, but after the AI ​​module is integrated inside the FPGA die, it is limited by the chip structure, and the transmission bandwidth and computing efficiency are relatively limited. It is difficult to achieve the expected work effect

Method used

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  • FPGA device for realizing on-chip network transmission bandwidth expansion function
  • FPGA device for realizing on-chip network transmission bandwidth expansion function
  • FPGA device for realizing on-chip network transmission bandwidth expansion function

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Embodiment Construction

[0021] The specific embodiments of the present invention will be further described below in conjunction with the accompanying drawings.

[0022] The application discloses an FPGA device for realizing the function of expanding the transmission bandwidth of the on-chip network. The FPGA device at least includes an FPGA die, and the FPGA die includes several logical resource modules, and the logical resource modules include common CLBs, PLBs, BRAM, DSP , PC, IOB, etc., each logical resource module has an interconnected resource module (INT) distributed around the logical resource module with the same structure, and the horizontal or vertical connections between each logical resource module are connected through the INT module . In addition, the FPGA die is also integrated with a predetermined function module. The predetermined function module is directly built with N hard core IP nodes. Adjacent hard core IP nodes are connected through routing channels. Each hard core IP node In...

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Abstract

The invention discloses an FPGA device for realizing an on-chip network transmission bandwidth expansion function, relating to the technical field of FPGA. When a predetermined function module with abuilt-in hard core IP node is integrated in a FPGA bare chip, a soft-core IP node and a hard-core IP node are formed by utilizing logic resource module configuration in the FPGA bare chip and are connected to form an NOC network structure, so that the addition of nodes is achieved, and transmission bandwidth of the predetermined function module can be expanded; the soft core IP node can be additionally connected to the input and output signals in the predetermined function module, and the transmission bandwidth of the predetermined function module can be expanded. Furthermore, the FPGA devicealso comprises a silicon connection layer in which a silicon connection layer NOC network is arranged, so that nodes in the FPGA bare chip can be connected to the silicon connection layer to form a larger NOC structure, the increase of the nodes is further realized, and the transmission bandwidth of a predetermined function module is expanded.

Description

technical field [0001] The invention relates to the field of FPGA technology, in particular to an FPGA device for realizing the function of expanding network transmission bandwidth on a chip. Background technique [0002] With the continuous improvement of integrated circuit manufacturing technology and the sharp increase in the amount of data, artificial intelligence has achieved rapid development in recent years, especially in March 2016 AlphaGo and the world champion of Go, professional nine-dan Go player Li Shishi played Go man-machine battle, Winning with a total score of 4 to 1 pushed artificial intelligence to unprecedented heights. The rapid development of human intelligence is inseparable from the improvement of the efficiency of big data, high-performance computing and machine learning algorithms. In the stage where machine learning algorithms are still being iteratively optimized, FPGAs have unique advantages in the field of artificial intelligence due to their p...

Claims

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Application Information

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IPC IPC(8): H04L12/775H04L12/933H04L45/58
CPCH04L45/583H04L49/109Y02D10/00
Inventor 徐彦峰单悦尔范继聪张艳飞闫华
Owner WUXI ESIONTECH CO LTD
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