Semiconductor storage device and product-sum operation device
A technology for storage devices and semiconductors, which is applied in the fields of semiconductor devices, semiconductor/solid-state device manufacturing, electric solid-state devices, etc., and can solve problems such as application
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no. 1 example
[0060] 1.1. Structure example
[0061] 1.2. Design example
[0062] 1.3. Manufacturing method
[0063] 1.4. Application example
[0064] 2. The second embodiment
[0065] 2.1. Structure example
[0066] 2.2. Design example
[0067] 2.3. Application examples
no. 3 example
[0069] 3.1. Structure example
[0070] 3.2. Design example
[0071] 3.3. Manufacturing method
[0072] 3.4. Variations
[0073]
[0074] (1.1. Structure example)
[0075] First, refer to figure 1 A structural example of the semiconductor memory device according to the first embodiment of the present disclosure is described. figure 1 is a longitudinal sectional view schematically showing a structural example of the semiconductor memory device according to the present embodiment.
[0076] Such as figure 1 As shown in , the semiconductor memory device 100 includes a semiconductor substrate 110 , a source or drain region 111 , a gate insulating film 121 , a lower electrode 120 , a ferroelectric film 131 , an upper electrode 130 and a conductor electrode 140 .
[0077] The semiconductor memory device 100 is a FeRAM having an MFMIS structure in which a ferroelectric capacitor is connected in series on a gate electrode of a field effect transistor. Specifically, a field effe...
no. 2 example
[0130] (2.1. Structure example)
[0131] Next, refer to Figure 10 A structural example of a semiconductor memory device according to a second embodiment of the present disclosure is described. Figure 10 is a perspective view schematically showing a structural example of the semiconductor memory device according to the present embodiment.
[0132] Such as Figure 10 As shown in , the semiconductor storage device 200 includes a semiconductor substrate 210, an insulating layer 212, a semiconductor layer 211, a source or drain region 215, a gate insulating film 214, a gate electrode 213, a lower electrode 217, a ferroelectric film 220, an upper electrode 221 and conductor electrode 222.
[0133] The semiconductor memory device 200 is a FeRAM having an MFMIS structure in which a ferroelectric capacitor is connected in series to a gate electrode of a field effect transistor. Specifically, the field effect transistor is a fin field effect transistor including a semiconductor la...
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Abstract
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