Multi-path source buffer circuit

Abstract

The invention discloses a multi-path source buffer circuit. The multi-path source buffer circuit comprises a single buffer circuit and a plurality of buffer circuits, the single buffer circuit comprises an MN4 and an MP4, and the MN4 and the MP4 are realized by a low-voltage device below 3.3 V; wherein the plurality of buffer circuits comprise a bias circuit shared by the plurality of buffer circuits, and the bias circuit is divided into two parts: one part is composed of amplifiers A1, A2 and A3, an MOS tube MNb and a bias current IBN; and the other part is composed of amplifiers A4, A5 and A6, an MOS tube MPb and bias current IBP. By adopting the low-voltage device, the matching performance can be improved by 3-4 times under the condition of the same area, and by adopting the new bias circuit, the working voltage of the drain end and the gate end of the bias current device provided by the input stage of the buffer can be strictly controlled, the working voltage of each buffer is ensured to be the same, and the consistency between channels is remarkably improved.

Description

technical field [0001] The invention relates to the technical field of source buffer circuits, in particular to a multi-channel source buffer circuit. Background technique [0002] In the display driver chip, one of the very important functional modules is the source driver module, such as figure 1 As shown, the driving part of the source driving module (also called the source buffer circuit) is implemented with an analog circuit, and is used to drive the source lines on the screen. Depending on the display resolution, the number of channels driven by the source will be different, but the number is generally on the order of hundreds to thousands. [0003] Such as figure 2 Shown is a schematic diagram of the rail-to-rail input stage circuit of the existing source buffer circuit, where MN1 and MN2 are NMOS input differential pairs, MN3 is an NMOS bias circuit, MP1 and MP2 are PMOS input differential pairs, and MP3 is a PMOS bias In the circuit, all devices are devices of 5...

AI Technical Summary

Problems solved by technology

[0004] According to the requirements of the buffer output drive voltage range, the source buffer circuit is basically realized by devices with an operating voltage above 5V. Poor matching performance between channels will lead to poor consistency between channels. One solution is to increase the area of ​​the device, but due to the large number of channels, this will significantly increase the area of ​​the chip, thereby increasing the cost of the chip

The second is that there are hundreds to thousands of buffer channels, and the distance between the channels at both ends of the chip is very long. The gradient caused by the chip production will seriously affect the consistency between the channels, and then seriously affect the display screen. display effect

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