Circuit capable of realizing chip internal clock calibration by using debugger

Abstract

The invention discloses a circuit capable of realizing chip internal clock calibration by using a debugger. The debugger is composed of a circuit part located inside a chip and a debugger body locatedoutside the chip. Wherein the circuit part comprises a calibration enabling and sequence controller, a clock counter and a data comparator, the clock counter is connected with a plurality of clock generators through a selector, the clock counter is also connected with the data comparator, and the data comparator is connected with the dichotomy controller; the beneficial effects of the invention are that the method can meet the demands of a user and a chip production plant for the calibration of the internal clock of the chip at the same time; 2, hardware realization of pure digital logic is easy to realize and integrate in chip design; 3, a hardware automatic calibration mode is used, extra software participation is not needed, and higher-precision calibration of the chip clock can be completed in a shorter time; and 4, calibration of a high-frequency clock which is difficult to output to a chip port can be completed.

Description

technical field [0001] The invention relates to a chip debugging technology, in particular to a circuit and a scheme which can use a debugger to realize clock calibration inside a chip. Background technique [0002] In the field of chip development and application, the clock inside the chip is usually calibrated during factory testing. However, after the chip leaves the factory, it is very inconvenient for the user to recalibrate it. The reason is that in common applications, there is no external reference clock that can be used for fine-tuning the internal clock of the chip, and there is no clock detection port output from the chip to the external interface. [0003] Existing chip internal clock calibration scheme: In chip development and application fields, especially in chips such as MCU / MPU / DSP with CPU and debug ports, most of the internal clocks are not connected to external ports, so clock fine-tuning Usually it can only be done on the test machine, and the referenc...

AI Technical Summary

Problems solved by technology

[0004] But there are problems: 1. This kind of clock signal calibration scheme requires a test machine to provide a reference clock, which is very costly and difficult for users to implement

However, in the actual application of the chip, the difference in ambient temperature and noise may cause the frequency deviation of the internal clock of the chip, or because of different application requirements, the user may need to readjust the internal clock frequency of the chip; 2. In chip design Without a dedicated clock calibration circuit, fast and accurate calibration cannot be performed

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