Detection system and detection method for edge removal width of wafer back sealing film
A detection system and edge technology, used in semiconductor/solid-state device testing/measurement, measuring devices, instruments, etc., can solve the problems of large errors and insufficient comprehensiveness of manual measurement of the edge removal width of the back sealing film, so as to solve the problems of large errors. , to ensure a comprehensive effect
Inactive Publication Date: 2020-12-18
XIAN ESWIN SILICON WAFER TECH CO LTD
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Problems solved by technology
[0005] In order to solve the above-mentioned technical problems, the present invention provides a detection system and detection method for the edge removal width of the wafer back-seal film, which solves the problem of insufficient data comprehensiveness and large errors in manual measurement of the edge removal width of the back-sealing film
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[0036] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention more clear, the following will clearly and completely describe the technical solutions of the embodiments of the present invention in conjunction with the drawings of the embodiments of the present invention. Apparently, the described embodiments are some, not all, embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the described embodiments of the present invention belong to the protection scope of the present invention.
[0037] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" etc. The orientation or positional relationship indicated is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying...
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The invention relates to a detection system and a detection method for the edge removal width of a wafer back sealing film. The detection system comprises a wafer bearing structure which comprises a pedestal and a bearing platform which is rotatingly disposed on the pedestal; an image acquisition structure used for acquiring images of a plurality of wafer edges at a preset frequency in the processthat the bearing platform drives the wafer to rotate for a circle at a preset speed; an image processing structure which comprises a first image processing unit and a second image processing unit, wherein the first image processing unit is used for carrying out binarization processing on the images of the wafer edges acquired by the image acquisition structure so as to acquire first position information of the edges of the back sealing film and second position information of the edges of the wafers in the images of the wafers edges, and the second image processing unit is used for obtaining the removal width of the edge of the back sealing film according to the first position information and the second position information; and a second image processing structure which judges whether theremoval of the edge of the back sealing film meets the standard or not according to whether the removal width is within the preset range or not.
Description
technical field [0001] The invention relates to the technical field of silicon wafer production, in particular to a detection system and a detection method for removing the edge width of a wafer back-sealing film. Background technique [0002] The continuous reduction of the characteristic line width of integrated circuits has higher requirements on the substrate silicon wafer, and it is becoming more and more difficult to control the native defects of single crystal silicon, so epitaxial wafers are increasingly used. Epitaxial wafers have electrical properties not found in polished wafers and eliminate many surface / near-surface defects that are introduced during crystal growth and subsequent wafer processing. Epitaxial wafers are mostly used in logic circuit chips, DRAM and CMOS devices, and have more advantages than polished wafers in terms of improving device performance and chip yield. [0003] In order to suppress the volatilization of impurities in the substrate durin...
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Login to View More IPC IPC(8): G01B11/02H01L21/66
CPCG01B11/02H01L22/12H01L22/20
Inventor 邹亚辉徐鹏
Owner XIAN ESWIN SILICON WAFER TECH CO LTD