Memory vulnerability detection method based on processor chip and electronic device

Abstract

The invention provides a memory vulnerability detection method based on a processor chip and an electronic device. The method comprises the steps of enabling a program to be decoded through a decodingunit in a central processing unit, and obtaining a virtual address in an execution instruction; calculating an ID of the virtual address, and if the ID is in a memory access trap index table of a memory management unit, sending the virtual address to an operating system; obtaining a corresponding memory access trap table according to the corresponding relationship between the ID in the memory access trap index table of the operating system and the memory access trap table, and synchronously updating the memory access trap index table of the memory management unit and the ID in the memory access trap index table of the operating system; and if the virtual address is in the corresponding memory access trap table, judging that the program is a malicious program. According to the method, thememory security can be protected in a fine-grained manner, the detection precision of malicious tampering behaviors is improved, and the sequence performance of the program is improved by proposing asecondary search strategy.

Description

technical field [0001] The invention belongs to the field of computer information security, and relates to a memory leak detection method based on a processor chip and an electronic device. Background technique [0002] Malicious tampering of memory is a prerequisite for constructing covert attack methods such as code injection attacks, code reuse attacks, and data stream hijacking attacks. Establishing a detection mechanism for memory safety can prevent such attacks with Turing completeness. [0003] Currently, the permission checking mechanism based on the page table is the most widely deployed measure to protect memory security. In this mechanism, the permission check on the memory access address occurs when the memory management unit performs virtual and real address translation through the transfer look-aside buffer (TLB), and performs permission check on the relevant page table entries. The permission check based on the page table has two disadvantages: First, the gr...

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Problems solved by technology

The permission check based on the page table has two disadvantages: First, the granularity of the permission check based on the page table is the page, and fine-grained permission check cannot be performed between objects in the same physical page

Second, when the permission of one of the pages changes, the entire TLB in the memory management unit needs to be refreshed, which brings a very high performance loss, making the permission checking mechanism based on the page table impossible in practical applications. to deploy

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