A kind of MCM integrated circuit packaging method integrated with SMT

Abstract

The application discloses a MCM integrated circuit packaging method that integrates SMT, which includes the following steps: S1, metal lead frame pretreatment; S2, adopting SMT technology to install active devices in the welding area of ​​the metal lead frame, and at the same time, install the active device on the metal lead frame Install chips in the chip area; S3, metal lead frame post-processing; S4, packaging processing. In this application, on the basis of integrating the SMT technology into the MCM integrated circuit packaging, the installation of active devices and chips can be completed in one process, which solves the problems in the background technology. That is, problem 1 is that because two processes are required successively, this increases the time for MCM packaging, making it difficult to improve the packaging efficiency. Problem 2 is that the soldering of active devices is carried out before the chip is packaged, and there is a certain reject rate in the soldering of active devices, and there is also a certain reject rate in the installation of the chip, which essentially increases the MCM package. risks, especially performance risks.

Description

technical field [0001] The application relates to an MCM integrated circuit packaging method integrated with SMT. Background technique [0002] SMT is surface assembly technology, which is the most popular technology and process in the electronic assembly industry. Specifically, it refers to a series of process processes processed on the basis of PCB; MCM technology is to assemble multiple bare chips and other components. On the same multilayer interconnect substrate, and then packaged, resulting in high-density and high-reliability microelectronic assemblies. In the combination of SMT and MCM technology, there are 3 patents disclosed in the Chinese patent literature, namely: Chinese invention application CN201811050739.8 a method of packaging MCM integrated circuits with SMT, and Chinese invention application CN201811051720.5 a fusion of SMT MCM integrated circuit packaging structure, Chinese invention application CN201811052270.1 An MCM integrated circuit packaging produc...

AI Technical Summary

Problems solved by technology

[0004] The key steps are "the active device installation device installs the active device on the metal lead frame; the metal lead frame with the active device is reflowed in the reflow soldering device, and the nitrogen protection is maintained in the reflow soldering device during this process." , through the reflow soldering device protected by nitrogen gas, the active device and the metal frame are closely bonded." In addition, the other steps of the above-mentioned technology essentially retain the general process of MCM integrated circuit packaging. Although the above-mentioned technology increases the active device and metal frame The efficiency of packaging chips together, but there are still many shortcomings. The essence of the active device and the chip is fixed on the metal lead frame respectively, which has caused some problems.

[0005] Problem 1 is that because two processes are required successively, this increases the time for MCM packaging, making it difficult to improve the packaging efficiency

[0006] Problem 2 is that the soldering of active devices is carried out before the chip is packaged, and there is a certain reject rate in the soldering of active devices, and there is also a certain reject rate in the installation of the chip, which essentially increases the MCM package. risk, especially the risk of efficacy

[0007] According to the above technology, assuming that the rejection rate of active device welding is n%, the time required is a, and assuming that the chip installation rejection rate is m%, the time required is b, then the performance of the MCM package in this technology (yield and The ratio of the time spent) is: (1-n%)*(1-m%) / (a+b), if the installation of the active device and the chip can be completed in one process, it is still assumed that the waste of the active device is soldered The rate is n%, the time required is a, assuming that the chip installation rejection rate is m%, the time required is b, then the efficiency of the MCM package in this technology is (1-n%) / a or (1-n%) / b is either (1-m%) / a or (1-m%) / b, which one depends on the size relationship between m and n, and also depends on the size relationship between a and b, But no matter how big the efficiency is, it is obvious that when n% and m% are less than 1, it can be proved that: (1-n%) / a or (1-n%) / b or (1-m%) / a or Yes (1-m%) / b is much larger than (1-n%)*(1-m%) / (a+b), so the MCM packaging technology involved in the patent in the background technology is substantially increased The risk of MCM packaging, especially the risk of performance, so if the installation of active devices and chips can be completed in one process, the above two problems can be solved

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