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Sensing techniques for a memory cell

A technology of memory cells and latches, which is applied in the field of sensing technology for memory cells, and can solve the problems of extra cost and manufacturing complexity, increasing the size or occupied area of ​​memory devices, etc.

Pending Publication Date: 2021-01-19
MICRON TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Some components included in a memory device can increase the size or footprint of the memory device, introducing additional cost and manufacturing complexity

Method used

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  • Sensing techniques for a memory cell
  • Sensing techniques for a memory cell
  • Sensing techniques for a memory cell

Examples

Experimental program
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Embodiment Construction

[0019] A memory device may perform one or more sensing operations on a memory cell in order to sense or read the logic state of the memory cell (eg, via one or more components of the memory device). For example, during a read operation, a memory cell may be coupled to a sensing element (eg, a latch) via a transistor in a source follower configuration (eg, by activating a word line and a cascode). The sensing component can sense the state of the memory cell by comparing a voltage signal associated with the memory cell with a reference voltage (eg, by latching or triggering the voltage signal and the reference signal). In some cases, a first voltage associated with a memory cell may be boosted to a second voltage, and then the second voltage may be shifted to a third voltage (eg, a voltage lower than the second voltage) before being sensed by the sensing component. ). Boosting and shifting may enable the third voltage to produce a usable signal, and may enable the third voltage...

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Abstract

The invention relates to sensing techniques for a memory cell. Methods, systems, and devices for sensing techniques for a memory cell are described to enable a latch to sense a logic state of a memorycell. A transistor coupled with a memory cell may boost a first voltage associated with the memory cell to a second voltage via one or more parasitic capacitances of the transistor. The second voltage may be developed on a first node of a sense component, and the second voltage may be shifted to a third voltage at a first node of the sense component by applying a voltage to a shift node coupled with a capacitor of the sense component. Similar boosting and shifting operations may be performed to develop a reference voltage on a second node of the sense component. The sense component may sensethe state of the memory cell by comparing with the reference voltage.

Description

[0001] cross reference [0002] This patent application asserts Ser. No. 16 / 515,666, entitled SENSING TECHNIQUES FOR A MEMORY CELL, filed July 18, 2019, by Di Vincenzo et al. Priority of U.S. Patent Application No. , assigned to its assignee and expressly incorporated herein by reference in its entirety. technical field [0003] The technical field relates to sensing techniques for memory cells. Background technique [0004] The following generally relates to systems including at least one memory device, and more particularly, to sensing techniques for memory cells. [0005] Memory devices are widely used to store information in various electronic devices such as computers, wireless communication devices, cameras, digital displays, and the like. Information is stored by programming the different states of the memory device. For example, binary devices mostly store one of two states typically represented by a logical one or a logical zero. In other devices, more than two...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C29/10G11C29/50G11C29/56
CPCG11C29/10G11C29/50G11C29/56G11C2029/5004G11C11/2273G11C11/221G11C11/2259G11C11/2293G11C11/4091
Inventor U·迪温琴佐E·博兰里那R·穆泽托F·贝代斯基
Owner MICRON TECH INC
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