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Memory computing circuit based on magnetic memory

A magnetic memory, memory computing technology, applied in static memory, digital memory information, information storage, etc., can solve problems such as difficult manufacturing, and achieve the effect of overcoming manufacturing integration and fast computing

Active Publication Date: 2022-03-01
CETHIK GRP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Integrating the processing unit and storage unit on the same chip is difficult to manufacture

Method used

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  • Memory computing circuit based on magnetic memory
  • Memory computing circuit based on magnetic memory
  • Memory computing circuit based on magnetic memory

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Embodiment Construction

[0021] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is only some embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0022] An embodiment of the present invention provides a memory computing circuit based on magnetic memory, such as figure 1 As shown, it includes: a magnetic memory array 101 and a multiplex read circuit 102, wherein,

[0023] The magnetic memory array 101 includes a plurality of memory cells distributed in an array. In this embodiment, the...

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Abstract

The present invention provides a memory computing circuit based on magnetic memory, including: a magnetic memory array and a multi-channel reading circuit, wherein a plurality of memory cells in each row of the magnetic memory array share one word line, and a plurality of memory cells in each column The cells share one source line, and multiple memory cells in each column or row share a pair of complementary bit lines. Each memory cell includes: a MOS transistor and two MTJs, and the MOS transistor is used to control the reading of the two MTJs. Write, the drain of the MOS transistor is connected to the two MTJs, the storage states of the two MTJs are opposite and the two MTJs form a group for recording one bit of data, and the two MTJs are connected to each other One of the bit lines in the corresponding complementary bit lines; the read circuit is used to read the state of one or more memory cells in a column or row sharing a pair of complementary bit lines, so as to realize a bitwise logic operation. The invention can directly realize memory calculation on the memory array.

Description

technical field [0001] The invention relates to the technical field of magnetic memory, in particular to a memory computing circuit based on magnetic memory. Background technique [0002] In the existing von Neumann architecture, the storage wall between the processor and the memory becomes a performance bottleneck affecting data calculation, and the data migration between the processor and the memory increases power consumption. [0003] In order to improve the speed of data calculation, there is a way to put a small number of processing units in or near the memory to realize near-memory computing, which can preprocess the original data in the memory and reduce the transmission bandwidth between the memory and the processor. demand, which can improve performance and reduce power consumption. [0004] However, in the process of realizing the present invention, the inventor finds that there are at least the following technical problems in the prior art: [0005] Integrating...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C11/16
CPCG11C11/1655G11C11/1657G11C11/1673G11C11/1675
Inventor 殷标孟皓
Owner CETHIK GRP
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