Memory element and manufacturing method thereof

Abstract

Provided are a memory element and a manufacturing method thereof. The element comprises a stacked structure, a pillar, a first stop layer, and a contact plug. The stacked structure includes a plurality of conductive layers. The pillar penetrates the plurality of series-connected memory cells. The plurality of series-connected memory cells are located in a layout pattern of pillar locations at cross-points between the pillar and the conductive layers. The first stop layer covers the stacked structure and a portion of a top surface of the pillar. The contact plug passes through the first stop layer, extending into the pillar, and is electrically connected to the plurality of series-connected memory cells. The contact is landed on the contact plug, and is electrically connected to a portion of the pillar through the contact plug.

Description

technical field [0001] The invention belongs to the technical field of semiconductor devices, and relates to a memory element and a manufacturing method thereof. Background technique [0002] As technology advances with each passing day, advances in electronic components have increased the need for greater storage capacity. In order to meet the requirement of high storage density, the size of the memory device becomes smaller and the integration level is higher. Therefore, the shape of the memory device has been developed from a 2D memory device with a planar gate structure to a 3D memory device with a vertical channel (VC) structure. However, 3D memory elements with vertical channel structures still face many challenges. Contents of the invention [0003] The invention provides a memory element which can increase the process margin and improve the reliability of the memory element. [0004] An embodiment of the present invention provides a memory element, including a s...

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Problems solved by technology

However, 3D memory elements with vertical channel structures still face many challenges

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