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Semiconductor package including conductive bumps

A conductive bump and semiconductor technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc.

Inactive Publication Date: 2021-03-12
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, there is a limit to how much the thickness of the wafer can be safely reduced because the wafer may warp or be damaged during the grinding process

Method used

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  • Semiconductor package including conductive bumps
  • Semiconductor package including conductive bumps
  • Semiconductor package including conductive bumps

Examples

Experimental program
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Embodiment Construction

[0019] Hereinafter, exemplary embodiments of the present disclosure will be explained in detail with reference to the accompanying drawings.

[0020] figure 1 is a cross-sectional view illustrating a semiconductor package according to an exemplary embodiment of the present disclosure. figure 2 is showing figure 1 An enlarged cross-sectional view of part A in . image 3 is showing figure 1 An enlarged cross-sectional view of part B in . Figure 4 is showing figure 1 An enlarged cross-sectional view of part C in .

[0021] refer to Figure 1 to Figure 4 , the semiconductor package 10 may include stacked semiconductor chips. The semiconductor package 10 may include a package substrate 500 , first to fourth semiconductor chips 100 , 200 , 300 , 400 , and a molding member 600 . In addition, the semiconductor package 10 may further include first to fourth conductive bumps 160, 260, 360, 460 and the outer connecting member 530.

[0022] The package substrate 500 may includ...

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Abstract

A semiconductor package is provided and includes a first semiconductor chip including a first through electrode. A second semiconductor chip is stacked on the first semiconductor chip. The second semiconductor chip includes a second through electrode. A plurality of conductive bumps are interposed between the first semiconductor chip and the second semiconductor chip. The conductive bumps electrically connect the first and second through electrodes to each other. A filling support layer at least partially covers a first surface of the second semiconductor chip facing the first semiconductor chip and at least partially fills spaces between the conductive bumps. An adhesive layer is disposed on the filling support layer at least partially filling the spaces between the conductive bumps and adhering the first and second semiconductor chips to each other.

Description

[0001] This application claims the benefit of priority from Korean Patent Application No. 10-2019-0112510 filed with the Korean Intellectual Property Office (KIPO) on September 11, 2019, the contents of which are hereby incorporated by reference in their entirety. technical field [0002] The present disclosure relates to a semiconductor package, and more particularly, to a semiconductor package including conductive bumps and a method of manufacturing the same. Background technique [0003] In manufacturing a multi-chip package including semiconductor chips electrically connected to each other through through electrodes, after the wafer is supported on a carrier substrate using a substrate support system, the backside of the wafer may be ground to reduce the thickness of the wafer. However, there is a limit to how much the thickness of the wafer can be safely reduced because the wafer may be warped or damaged during the grinding process. Contents of the invention [0004] ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/31H01L23/498H01L21/60
CPCH01L23/3128H01L23/49816H01L24/10H01L24/17H01L24/13H01L24/29H01L25/0657H01L21/6835H01L2221/68304H01L2924/15311H01L2225/06513H01L2225/06517H01L2225/06541H01L25/50H01L25/0652H01L2224/16146H01L2224/16147H01L2224/17181H01L2224/73204H01L2224/32145H01L2224/32225H01L2224/16237H01L2224/0401H01L2224/05567H01L2224/05572H01L2224/1147H01L2224/11462H01L2224/1132H01L2224/11849H01L2224/94H01L2224/274H01L2224/81191H01L2224/83191H01L2224/73103H01L2224/13022H01L2224/33181H01L2224/81815H01L2224/83862H01L2224/83203H01L2224/81203H01L24/32H01L24/16H01L24/81H01L21/563H01L2224/9211H01L2924/3511H01L2224/05655H01L2224/05647H01L2224/05099H01L2224/05671H01L2224/05611H01L2224/81399H01L2224/05666H01L2224/05664H01L2224/2919H01L2924/00014H01L2224/11H01L2224/27H01L2924/00012H01L2224/16225H01L2924/00H01L2224/81H01L2224/8385H01L2224/16145H01L2924/013H01L2924/01046H01L2924/0105H01L2924/01022H01L2924/01029H01L2924/01024H01L2924/01028H01L2924/06H01L23/49827H01L23/293H01L23/31H01L23/481H01L24/06H01L23/485H01L23/3178H01L24/73H01L24/05
Inventor 李世容
Owner SAMSUNG ELECTRONICS CO LTD
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