Electrostatic discharge protection clamping circuit

Abstract

The invention belongs to the technical field of semiconductors, and discloses an electrostatic discharge protection clamping circuit for a silicon-on-insulator circuit. The circuit is uses as a circuit which requires that a discharge path cannot exist between a control port and a power supply and between a data port and the power supply, and that the power supply and an OUT port only allow two ormore MOS transistors to be connected in series. The circuit comprises a port PAD, a first electrostatic impedor, a second electrostatic impedor, a third electrostatic impedor, a fourth electrostatic impedor, a fifth electrostatic impedor and a pseudo power supply, wherein the port PAD is connected with a pseudo power supply through a first electrostatic impedor; the port PAD is grounded through the second electrostatic impedor; the port PAD is also grounded through a third electrostatic impedor; the port PAD is also grounded through a fifth electrostatic impedor and a fourth electrostatic impedor in sequence; the connection point of the first electrostatic impedor and the pseudo power supply is grounded through a third electrostatic impedor; and a connection point of the fifth electrostatic impedor and the fourth electrostatic impedor is provided with a protection object connection port. According to the electrostatic discharge protection clamping circuit provided by the invention, theelectrostatic discharge protection performance of the circuit is improved on the premise of meeting the cold backup characteristic requirement of the circuit.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to an electrostatic discharge protection clamping circuit. Background technique [0002] With the development of the semiconductor industry, especially after entering the deep submicron scale, due to the characteristics of thin silicon film and poor heat dissipation ability of SOI technology, the electrostatic discharge (ESD) protection ability of the drain end of the output tube becomes very poor. In the SOI process, the industry usually adopts the ESD global protection structure to solve the problem of poor ESD current discharge capability at the output terminal / bidirectional terminal of the SOI chip and the limited discharge capacity of the single loop bleeder tube, which makes the ESD protection of SOI integrated circuits Ability has been comprehensively improved. However, for some SOI circuits with special requirements, such as Figure 4 As shown in the conventional bus...

AI Technical Summary

Problems solved by technology

[0003] The present invention provides an electrostatic discharge protection clamping circuit, aiming at a circuit that requires no discharge path between the control port and the data port and the power supply, and the power supply and the OUT port only allow two or more MOS transistors to be connected in series, so as to improve such special requirements ESD protection capability of the circuit

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