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An electrostatic discharge protection clamp circuit

A technology of electrostatic discharge protection and clamping circuit, which is applied in the direction of emergency protection circuit device, emergency protection circuit device, circuit device, etc. used to limit overcurrent/overvoltage, can solve the problems of discharge path and other problems, and achieve the improvement of electrostatic discharge The effect of protective performance

Active Publication Date: 2022-08-05
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The present invention provides an electrostatic discharge protection clamping circuit, aiming at a circuit that requires no discharge path between the control port and the data port and the power supply, and the power supply and the OUT port only allow two or more MOS transistors to be connected in series, so as to improve such special requirements ESD protection capability of the circuit

Method used

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  • An electrostatic discharge protection clamp circuit
  • An electrostatic discharge protection clamp circuit
  • An electrostatic discharge protection clamp circuit

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Embodiment Construction

[0029] The embodiments of the present application provide an electrostatic discharge protection clamp circuit, which improves the performance of the circuit that requires no discharge path between the control and data ports and the power supply, and that only allows two or more MOS transistors to be connected in series with the power supply and the OUT port. ESD protection capability of circuits with special requirements.

[0030] In order to better understand the above technical solutions, the above technical solutions will be described in detail below with reference to the accompanying drawings and specific embodiments of the description. , rather than limiting the technical solutions of the present application, the embodiments of the present application and the technical features in the embodiments may be combined with each other under the condition of no conflict.

[0031] see figure 1 , a silicon-on-insulator circuit electrostatic discharge protection clamp circuit, use...

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Abstract

The invention belongs to the technical field of semiconductors, and discloses an electrostatic discharge protection clamping circuit of a silicon-on-insulator circuit, which is used for requiring that neither a control port nor a data port have a discharge path with a power supply, and only two and OUT ports are allowed to be connected in series. More MOS transistor circuits; including: port PAD, first, second, third, fourth, fifth electrostatic resistors and pseudo power supply; port PAD is connected to pseudo power supply through the first electrostatic resistor; port PAD passes through the second electrostatic resistor The electrostatic resistor is grounded; the port PAD is also grounded through the third electrostatic resistor; the port PAD is also grounded through the fifth and fourth electrostatic resistors in sequence; the connection point between the first electrostatic resistor and the pseudo power source is grounded through the third electrostatic resistor; Wherein, the connection point of the fifth and fourth electrostatic resistors is provided with a protection object connection port. The electrostatic discharge protection clamp circuit provided by the invention improves the electrostatic discharge protection performance of the circuit on the premise of meeting the requirement of the cold backup characteristic of the circuit.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to an electrostatic discharge protection clamp circuit. Background technique [0002] With the development of the semiconductor industry, especially after entering the deep sub-micron scale, due to the thin silicon film and poor heat dissipation capability of SOI technology, the electrostatic discharge (ESD) protection capability of the drain end of the output tube has become very poor. In the SOI process, the industry usually adopts the ESD global protection structure to solve the problem of poor ESD current discharge capability at the output end / bidirectional end of the SOI chip and the problem of the limited discharge ESD current capability of a single loop bleeder tube, which makes the ESD protection of SOI integrated circuits. The ability has been comprehensively improved. However, for some SOI circuits with special requirements, such as Figure 4 The conventional bus d...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H02H9/00H02H9/02
CPCH02H9/00H02H9/005H02H9/02H02H9/025
Inventor 李晓静曾传滨高林春闫薇薇倪涛王加鑫李多力罗家俊韩郑生
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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