Method and device for realizing sparse matrix multiplication on reconfigurable processor array

Abstract

The invention discloses a method and device for realizing sparse matrix multiplication on a reconfigurable processor array, and the method comprises the steps: storing a first sparse matrix and a second sparse matrix to be multiplied in a column compression format, obtaining a numerical array, a row number array and a column offset array of non-zero elements in the first sparse matrix and the second sparse matrix; multiplying non-zero elements in the first sparse matrix and the second sparse matrix by using a column priority method through a plurality of processors in the reconfigurable processor array to obtain a plurality of compressed columns, each compressed column comprising a numerical array and a row number array; and merging the plurality of compressed columns subjected to multiplication by adopting a double-tone sorting and merging method through a plurality of processors in the reconfigurable processor array to obtain multiplication results of the first sparse matrix and thesecond sparse matrix. According to the invention, sparse matrix multiplication can be efficiently realized on the reconfigurable processing array.

Description

technical field [0001] The invention relates to the field of reconfigurable computing, in particular to a method and device for implementing sparse matrix multiplication on a reconfigurable processor array. Background technique [0002] This section is intended to provide a background or context to embodiments of the invention that are recited in the claims. The descriptions herein are not admitted to be prior art by inclusion in this section. [0003] In recent years, the increasing amount of data has put forward higher and higher requirements on the power consumption and performance of computing chips. Over the past few decades, the semiconductor industry and the performance of processors have grown rapidly as Moore's Law has continued. However, Moore's Law is coming to an end, but people's demand for computing power, performance and power consumption has not stopped. For the latest generation of equipment, the requirements for higher performance and lower power consumpt...

AI Technical Summary

Problems solved by technology

Compared with static reconfigurable processors, this method reduces the time cost of reconfiguration and has high flexibility, but correspondingly increases power consumption

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