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Semiconductor storage device

A storage device and semiconductor technology, which is applied in semiconductor devices, information storage, semiconductor/solid-state device manufacturing, etc., can solve the problems that hinder the high speed of semiconductor storage devices and increase the resistance

Pending Publication Date: 2021-03-16
KIOXIA CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, the resistance between the bit line and the transistor increases, which may hinder the speed-up of the semiconductor memory device.

Method used

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  • Semiconductor storage device
  • Semiconductor storage device
  • Semiconductor storage device

Examples

Experimental program
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Embodiment Construction

[0022] Hereinafter, embodiments of the present invention will be described with reference to the drawings. figure 1 It is a perspective view schematically showing the semiconductor memory device in the embodiment. This semiconductor memory device has bit lines BL, word lines WL (WLu, WLd), and memory cells MC (MCu, MCd).

[0023] The bit lines BL( 1 ) to BL(j) along the X-axis direction (an example of the second direction) are arranged side by side along the Y-axis direction (j: integer). The bit line BL has an upper surface (an example of the first surface) facing the positive direction of the Z axis (an example of the third direction different from the first and second directions), and a lower surface facing the negative direction of the Z axis (the same as the third direction different from the first and second directions). 1 surface is an example of the 4th surface on the opposite side), and two side surfaces (2nd, An example from side 3).

[0024] The word lines WLu(1...

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PUM

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Abstract

A semiconductor memory device in one embodiment includes a plurality of word lines, a plurality of bit lines, and a plurality of first semiconductor transistors. The plurality of word lines are alongthe first direction. The plurality of bit lines have a first surface, a second surface, and a third surface along a second direction different from the first direction. The first surface faces a thirddirection different from the first direction and the second direction. The second surface faces a fourth direction different from the second direction and the third direction. The third surface is disposed on the opposite side of the second surface. The plurality of first semiconductor transistors have a gate connected to any one word line among the plurality of word lines, and a channel connected to the first surface and the second or third surface of any one bit line among the plurality of bit lines.

Description

[0001] References to related applications [0002] This application is based on and seeks the benefit of the priority of the prior Japanese Patent Application No. 2019-167781 filed on September 13, 2019, the entire contents of which are incorporated herein by reference. technical field [0003] Embodiments of the present invention relate to a semiconductor memory device. Background technique [0004] A semiconductor memory device having a bit line, a word line, and memory cells (transistors and capacitors) connected to the bit line and the word line is currently used. Data can be written and read from memory cells by applying voltages to selected bit lines and word lines. [0005] The density of semiconductor storage devices is gradually increasing, and the line width of bit lines is becoming thinner. Therefore, the resistance between the bit line and the transistor increases, which may impede the increase in speed of the semiconductor memory device. Contents of the inv...

Claims

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Application Information

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IPC IPC(8): H01L27/108H01L21/8242
CPCH10B12/30H10B12/03H10B12/05H10B12/50H10B12/482H01L29/66969H01L29/78642H01L29/7869H10B12/315H10B12/34H10B12/036H10B12/488H10B12/033H01L23/528H01L29/1037H01L29/7827H01L29/24G11C14/0009H10B12/00
Inventor 和田政春池田圭司
Owner KIOXIA CORP
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