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Data processing apparatus and data processing method

A data processing device and data technology, applied in the direction of electrical digital data processing, computing operation devices, digital computer parts, etc., can solve problems such as speed difficulties

Pending Publication Date: 2021-03-23
THE UNIV OF TOKYO +2
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0013] As discussed above, improving the speed at which simple hardware in both digital and analog computing devices can be used to solve specific problems has become difficult in the prior art

Method used

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  • Data processing apparatus and data processing method
  • Data processing apparatus and data processing method
  • Data processing apparatus and data processing method

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Embodiment Construction

[0029] Such as figure 1 One of the preferred embodiments of the present invention shown in FIG. 1 is a data processing apparatus 1 comprising a processor 11 and an input-output device 13 .

[0030] In this embodiment, similar to the Ising machine and the Hopfield neural network, the data processing device 1 includes a state encoding unit in which binary variables of a combinatorial optimization problem are mapped to analog variables as described later. In addition to this, the data processing device 1 also includes another subsystem called an error encoding unit, which corrects the mapping between the steady state of the data processing device 1 and the configuration of the lower cost value of the combinatorial optimization problem, and the state The encoding unit is asymmetrically connected to the error encoding unit.

[0031] Processor 11 may be an FPGA including logic gates and memory blocks. In this embodiment, the processor 11 is configured to iterate the updating of th...

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Abstract

A data processing apparatus is configured to solve a specific problem using a simple hardware. The data processing apparatus comprises a state data processing unit configured to iterate update of state data by a predetermined time evolutional process, a cost evaluation unit configured to evaluate a cost function for current state data, and an error calculation unit configured to calculate error values relating to amplitude homogeneity of the current state data, wherein the state data processing unit performs the time evolutional process on the state data to update the current state data basedon the cost function and the error values which are calculated by the error calculation unit.

Description

technical field [0001] The invention relates to a data processing unit for solving combinatorial optimization problems. Background technique [0002] To solve combinatorial optimization problems, conventional digital computers employ algorithms that are compiled to run on a general-purpose central processing unit (CPU). Rapid miniaturization of digital hardware (eg, the number of transistors in a CPU) has been possible over the years. However, the limit of minimizing digital components is almost reached, since very compact transistors cannot be fabricated to achieve sufficient energy efficiency while operating robustly. Theoretically, the computational processes employed by these conventional computers can generally be described within the framework of a von Neumann architecture. [0003] Given that the computations of these conventional computers can be formalized using Turing machines, these computers have the "universal" computing power demonstrated by the Church-Turing...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06N10/00G02F3/00G06F11/30G06F15/173
CPCG06N10/00G06N5/01B82Y10/00G06F15/7892G06F15/82G06F2015/768G06G7/12
Inventor T·G·勒卢相原和幸山本佳久P·麦克马洪
Owner THE UNIV OF TOKYO
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