Semiconductor device and preparation method thereof

Abstract

The invention relates to a semiconductor device and a preparation method thereof, which are used for preparing a memory device and comprise the following steps of providing a substrate; digging a marking groove in the surface of the substrate, wherein the marking groove goes deep into the substrate; forming a filling material layer in the marking groove so as to form a zero-layer mark, and enabling the etching rate of the filling material layer to be lower than a preset value by grinding liquid used during chemical mechanical grinding; forming a stacking structure on the surface of the substrate, the stacking structure being used for forming a bottom gate, and the stacking structure covering the zero-layer mark; and digging an isolation groove in the surface of the stacked structure, wherein the isolation groove is used for isolating two adjacent bottom gates to be formed on the stacked structure.

Description

technical field [0001] The invention relates to the field of chip production, in particular to a semiconductor device and a preparation method thereof. Background technique [0002] In the process of manufacturing a memory device, a zero-layer mark for marking a position is usually formed on the underlying substrate, which is used as a position reference standard for subsequent formation of various device layers formed on the underlying substrate. The zero-layer mark is composed of mark grooves and fillers formed on the underlying substrate, and the optical parameters of the fillers in the mark grooves are known, so that the refraction and reflection of light can be used to determine the relative on the alignment of the underlying substrate. [0003] At present, in the process of forming a memory device, damage to the zero-layer mark often occurs, which directly affects the success rate when the device layer is aligned with the zero-layer mark, and ultimately affects the ma...

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Problems solved by technology

[0003] At present, in the process of forming memory devices, damage to the zero-layer mark often occurs, which directly affects the success rate of device layer alignment with the zero-layer mark, and ultimately affects the manufacturing yield of memory devices

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