Buried gate structure and fabrication method thereof

Abstract

The present invention relates to a buried gate structure and a manufacturing method thereof. The method for fabricating a buried gate comprises: providing a semiconductor substrate with a shallow trench isolation structure and a plurality of active regions arranged in parallel and staggered; forming and patterning a hard mask layer to form a Gate trench pattern; using the hard mask layer as a mask, the semiconductor substrate is etched using a pulsed bias power output mode to form gate trenches extending through multiple active regions and shallow trench isolation structures The difference between the depths of the gate trenches within the plurality of shallow trench isolation structures is smaller than a predetermined value. In the present invention, when the gate trench is formed based on the pulsed bias power output mode, the discharge time of the etching product is increased, so that the etching product in the narrow shallow trench isolation structure can be discharged in time, thereby reducing the gate The difference in the depths of the pole trenches within the plurality of shallow trench isolation structures increases the gate current.

Description

technical field [0001] The present invention relates to the technical field of semiconductor fabrication technology, in particular to a buried gate structure and a fabrication method thereof. Background technique [0002] As one of the necessary components in integrated circuits, gates play the role of switches in circuits and are widely used in integrated circuits. [0003] Please also see figure 1 and figure 2 , With the shrinking of the structure size of semiconductor devices, in order to further increase the density of active regions in the manufacture of integrated circuits below 20nm, the active regions are arranged in a parallel and staggered manner, so that in the process of etching the gate trenches Encounter shallow trench isolation (Shallow Trench Isolation, STI) structures with different widths, such as figure 1 The width of the shallow trench in the L (Long) region is larger than the trench width in the S (Short) region. like figure 2 shown, the grooves o...

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Problems solved by technology

[0004] Based on this, in order to solve the problem of small driving current caused by inconsistent gate trench depths in semiconductor devices, a buried gate structure and its manufacturing method are provided.

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