Semiconductor packaging method, semiconductor packaging structure and packaging body

Abstract

The invention provides a semiconductor packaging method, a semiconductor packaging structure and a packaging body. The packaging method comprises the following steps: providing a substrate wafer provided with a first surface and a second surface, wherein the first surface and the second surface are opposite to each other, a plurality of grooves are formed in the first surface, a plurality of conductive columns are arranged at the bottoms of the grooves, and the conductive column penetrates through the bottom of the groove to the second surface; providing a plurality of semiconductor bare chip stacks; placing the semiconductor bare chip stacks in the groove, wherein the upper surface of the semiconductor bare chip stack is lower than or flush with the upper edge of the groove, and the bottom of the semiconductor bare chip stack is electrically connected with the conductive columns; and filling a gap between the side wall of the groove and the semiconductor bare chip stack with an insulating medium to form an insulating medium layer, and covering the upper surface of the semiconductor bare chip stack with the insulating medium layer to seal the semiconductor bare chip stack so as to form the semiconductor packaging structure. The semiconductor packaging structure has the advantages that the formed semiconductor packaging structure is low in packaging height, high in stability, high in reliability and low in warping degree.

Description

technical field [0001] The invention relates to the field of semiconductor packaging, in particular to a semiconductor packaging method, a semiconductor packaging structure and a packaging body. Background technique [0002] Stacked packaging technology, also known as 3D or three-dimensional packaging technology, is one of the mainstream multi-chip packaging technologies at present. Blocks with complete functions) are superimposed in the vertical direction and are often used to manufacture electronic components such as memory chips, logic chips, and processor chips. With the development of the electronic industry, high capacity, high function, high speed and small size of electronic components are required. In order to meet the above requirements, it is necessary to incorporate more chips into a single package, which will cause the package height of electronic components to become higher, and when the semiconductor package structure moves or vibrates, there may be a slight ...

AI Technical Summary

Problems solved by technology

In order to meet the above requirements, more chips need to be incorporated into a single package, which will cause the package height of electronic components to become higher, and in the case of movement or vibration of the semiconductor package structure, there may be a slight misalignment between the chips, resulting in The reliability of the package structure becomes lower, which affects the performance of the package structure

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