Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Method and device for analyzing graph density of chip and electronic equipment

A technology of pattern density and analysis method, applied in electrical digital data processing, computer-aided design, special data processing applications, etc., can solve the problems of reducing product yield, reducing the efficiency of layout pattern density analysis, etc.

Pending Publication Date: 2021-05-18
SHANGHAI HUALI MICROELECTRONICS CORP
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Based on this, the current conventional pattern density inspection method only uses simulation software to find areas with too high or too low pattern density in the layout pattern, but it cannot allow researchers to directly view the overall distribution of the pattern density of the layout pattern and the various areas in the layout pattern. The pattern density value corresponding to the area, thereby reducing the analysis efficiency of the pattern pattern density of the layout, and finally increasing the process defect rate in the subsequent manufacturing process and reducing the product yield

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method and device for analyzing graph density of chip and electronic equipment
  • Method and device for analyzing graph density of chip and electronic equipment
  • Method and device for analyzing graph density of chip and electronic equipment

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0045] The specific implementation manner of the present invention will be described in more detail below with reference to schematic diagrams. The advantages and features of the present invention will be more apparent from the following description. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.

[0046] As mentioned in the background, in the prior art, the method of adding redundant patterns is to use manual or software to automatically fill redundant metals to improve the uniformity of layout pattern density. Based on this, the current conventional pattern density inspection method only uses simulation software to find areas with too high or too low pattern density in the layout pattern, but it cannot allow researchers to directly view the overall distribution of the pattern density of the layout pattern a...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides an analysis method and device for the graph density of a chip and electronic equipment, and is applied to the technical field of semiconductors. According to the graph density analysis method provided by the invention, after the graph density of each region in the edition graph is calculated, the graph density of each region is displayed in a graph display mode through the preset display strategy; therefore, a technician can visually check the distribution condition of the graph density of each area in the layout, the analysis efficiency of the graph density of the layout is improved, finally, the process defect rate in the subsequent manufacturing process is reduced, and the product yield is increased.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to an analysis method, device and electronic equipment for pattern density of a chip. Background technique [0002] With the development of integrated circuit technology, pattern density inspection and analysis has become an important step in the data processing of many key-level masks; in the semiconductor manufacturing process, the uniformity of pattern distribution density has a great impact on many etching steps. In the case of uneven distribution, it is easy to aggravate the load effect in the etching step, causing the final size of some patterns to deviate from the target size. In addition, in the CMP (Chemical Mechanical Polishing) process, the pattern distribution density also has a certain impact on the grinding results of CMP. A good pattern distribution density is also one of the requirements to ensure the flatness of the film after grinding, thereby reducing the s...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): G06F30/398
CPCG06F30/398
Inventor 高原
Owner SHANGHAI HUALI MICROELECTRONICS CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com