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Stacked die package with curved spacers

A die-bent, edge-bend technology used in semiconductor device components to address problems such as die cracks

Active Publication Date: 2022-03-08
WESTERN DIGITAL TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, stacking of dies can put pressure on dies lower in the stack, which can cause dies to crack

Method used

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  • Stacked die package with curved spacers
  • Stacked die package with curved spacers
  • Stacked die package with curved spacers

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0019] Embodiments of the disclosed subject matter include a spacer in a stacked die package, wherein the spacer has a curved edge having one or more curved lines. A spacer is located between the substrate and the bottom die in the stack of dies. A memory device typically includes a stack of multiple memory dies. Thus, although the present technique is described with reference to a memory device having a stack of memory dies, it will be apparent to those skilled in the art that the present technique is applicable to semiconductor packages in general, and not just to memory devices.

[0020] In conventional memory arrays, cracks in the nonvolatile memory die can be caused at least in part by stress at the straight edges (i.e., non-curved edges) of the spacer placed between the nonvolatile memory die and the substrate. Concentration caused. Embodiments disclosed herein can reduce such cracks in non-volatile memory dies by, for example, distributing stress along one or more cur...

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PUM

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Abstract

Devices and techniques are disclosed that include a substrate, a controller die mounted on the substrate, fingers electrically connecting the controller die to the substrate, a A spacer with a memory die mounted on the substrate and a first memory die mounted on the spacer. The first memory die is attached to the top surface of the spacer. The spacer has a curved edge facing the controller. The curved edge may have a first curve including a first curve apex extending away from the controller, a first curve peak on one side of the first curve apex, and a first curve apex at the first curve apex. A second curve peak on the opposite side of the curve apex to said first curve peak. an additional finger connects the controller and the first memory die at a point aligned with the space between the first curve and a line extending from the peak of the first curve and the peak of the second curve .

Description

technical field [0001] The technology relates to semiconductor device assemblies, and more particularly, to die spacers. Background technique [0002] In order to fit more memory in a small package, memory devices, like other semiconductor devices, use die stacking. However, stacking of dies can put pressure on dies lower in the stack, which can cause the dies to crack. It is advantageous to reduce the stress on the lower die in the stack to avoid die cracking. It would also be advantageous to be able to position adjacent die on a substrate closer to each other. Description of drawings [0003] figure 1 is a schematic block diagram of a memory system; [0004] Figure 2A is a bottom view of a conventional semiconductor device with spacers including straight edges; [0005] Figure 2B for Figure 2A A cross-sectional side view of a conventional semiconductor device; [0006] Figure 2C for Figure 2A A top view of a conventional semiconductor device; [0007] ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L25/07H01L23/10
CPCH01L25/071H01L23/10H01L25/18H01L2225/06506H01L2225/06562H01L23/13H01L2225/06575H01L2225/0651H01L2225/06555H01L25/0652H01L2224/49171H01L2224/48091H01L2224/48227H01L2224/48145H01L2924/00014H01L24/32H01L24/48H01L2224/83138H01L2224/32014H01L2924/1431H01L2924/1434H01L24/83H01L2924/386H01L2224/45099H01L25/0657H01L23/49811H01L25/50H01L24/45
Inventor K-C.陈P-Y.黄J-W.徐
Owner WESTERN DIGITAL TECH INC