Method and system for automatically correcting wafer flatness in double-sided polishing process

A double-sided polishing and flatness technology, applied in grinding/polishing equipment, machine tools suitable for grinding workpiece planes, grinding devices, etc., to achieve automatic adjustment, improve product yield, and achieve control effects

Pending Publication Date: 2021-05-28
ZING SEMICON CORP
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  • Abstract
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Problems solved by technology

[0004] However, the existing DSP process m

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  • Method and system for automatically correcting wafer flatness in double-sided polishing process
  • Method and system for automatically correcting wafer flatness in double-sided polishing process
  • Method and system for automatically correcting wafer flatness in double-sided polishing process

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[0033]In the following description, a large number of specific details are given to provide more thorough understanding of the present invention. However, it will be apparent to those skilled in the art that the present invention may be implemented without one or more of these details. In other examples, in order to avoid confusion with the present invention, it is not described in the technical features known in the art.

[0034]It should be understood that the present invention can be implemented in different forms without interpreting embodiments of the embodiments set forth herein. Conversely, these embodiments will be made entirely and complete, and the scope of the invention is fully transmitted to those skilled in the art. In the drawings, for clarity, the size of the layer and the region, the size and the relative dimension may be exaggerated. From the beginning, the same reference numerals indicate the same components.

[0035]It should be understood that when the element or laye...

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Abstract

The invention discloses a method and system for automatically correcting wafer flatness in the double-face polishing process. The method comprises the steps that the temperature of the outer side of an upper polishing disc and the temperature of the inner side of the upper polishing disc are obtained; the temperature of the outer side of the upper polishing disc is compared with the temperature of the inner side of the upper polishing disc; and the height difference between the inner side of the upper polishing disc and the outer side of the upper polishing disc is adjusted based on the temperature difference between the outer side of the upper polishing disc and the inner side of the upper polishing disc. According to the method for automatically correcting the wafer flatness in the double-face polishing process, the height difference between the inner side of the upper polishing disc and the outer side of the upper polishing disc is automatically adjusted based on the temperature difference between the outer side of the upper polishing disc and the inner side of the upper polishing disc, and automatic adjustment of the wafer flatness in the double-face polishing process is achieved; and the wafer flatness control is realized, and the product yield is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method and system for automatically correcting wafer flatness during double-side polishing. Background technique [0002] With the continuous development of integrated circuit (Integrated circuit, IC) manufacturing technology, the feature size of the chip is getting smaller and smaller, the number of interconnection layers is increasing, and the diameter of the wafer is also increasing. To achieve multi-layer wiring, the wafer surface must have extremely high flatness, smoothness and cleanliness, and chemical mechanical polishing is currently the most effective wafer planarization technology. [0003] The surface polishing of silicon wafers mostly adopts double side polishing (Double Side Polish, DSP), usually using alkaline silica polishing fluid, and the chemical reaction is Si+H 2 O+2OH - → SiO 3 2- +2H 2 , it uses the chemical corrosion reaction of alkali and si...

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Application Information

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IPC IPC(8): B24B37/08B24B7/22B24B37/015B24B37/005
CPCB24B37/08B24B7/228B24B37/015B24B37/005
Inventor 权林胡文才张宇磊周嬅季文明
Owner ZING SEMICON CORP
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