Failure unit test method and device, storage medium and electronic equipment

A unit testing and memory technology, applied in static memory, instruments, etc., to solve problems such as system crashes

Inactive Publication Date: 2021-06-08
CHANGXIN MEMORY TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, for SoCs on the application side, if the system runs on a failed unit, it will cause the system to crash

Method used

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  • Failure unit test method and device, storage medium and electronic equipment
  • Failure unit test method and device, storage medium and electronic equipment
  • Failure unit test method and device, storage medium and electronic equipment

Examples

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Embodiment Construction

[0048] Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The same reference numerals denote the same or similar parts in the drawings, and thus their repeated descriptions will be omitted.

[0049] Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided in order to give a thorough understanding of embodiments of the present disclosure. However, those skilled in the art will appreciate that the technical solutions of the present disclosure may be practiced without one or mo...

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Abstract

The invention relates to a failure unit test method and device, a storage medium and electronic equipment, and relates to the technical field of integrated circuits. The failure unit test method comprises the following steps: after a system is started, writing test data into a DRAM; stopping sending a refreshing instruction to the DRAM, and waiting for a preset time; reading data in the DRAM, comparing the read data with the written test data, and determining flipped data in the DRAM according to a comparison result of the read data and the written test data; and determining a failure unit in the DRAM according to a storage unit where the flipped data is located. The invention provides a method for executing a failure unit test at an application side.

Description

technical field [0001] The present disclosure relates to the technical field of integrated circuits, and in particular, to a failure unit testing method and device, a storage medium, and electronic equipment. Background technique [0002] Dynamic Random Access Memory (Dynamic Random Access Memory, DRAM) is a semiconductor memory device commonly used in computers, and stores data in the form of charges stored in memory cell capacitors. DRAM has limited data retention characteristics due to the leakage of charge stored in memory cell capacitors over time. [0003] Data retention time is an important index to measure data retention characteristics, and is the duration of data retention in DRAM cells. In the final yield test before DRAM leaves the factory, there will be a test on the degradation of data retention time. [0004] However, for the SoC on the application side, if the system runs on the failed unit, it will cause the system to crash. [0005] It should be noted th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C29/56
CPCG11C29/56
Inventor 余玉
Owner CHANGXIN MEMORY TECH INC
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