STI forming method

Abstract

The invention discloses an STI forming method, and relates to the field of semiconductor manufacturing. The method comprises the following steps: forming a liner oxide layer and a liner silicon nitride layer on the surface of a substrate; forming a shallow trench in the substrate through photoetching and etching processes; forming a lining oxide layer and a lining silicon nitride layer of the shallow trench; depositing silicon oxide to enable the shallow trench to be completely filled with the silicon oxide, and enabling the silicon oxide to cover the substrate; carrying out CMP treatment on the substrate; adjusting the silicon oxide layer through an etching process to make the top of the silicon oxide layer not higher than the top of the shallow trench; removing the lining silicon nitride layer which is not covered by the silicon oxide layer; depositing silicon oxide again to enable the shallow trench to be completely filled with the silicon oxide, and enabling the silicon oxide to cover the substrate; and removing the silicon oxide on the surface of the substrate and the liner silicon nitride layer to form shallow trench isolation. The problem that the vertex angle of the shallow trench isolation is easy to be sunken due to the fact that the redundant silicon nitride layer on the surface of the substrate is removed through a wet etching process is solved. And the effect of improving the performance of the device is achieved.

Description

technical field [0001] The present application relates to the field of semiconductor manufacturing, in particular to a method for forming an STI. Background technique [0002] As the size of semiconductor devices continues to decrease, the size of isolation regions between devices also decreases accordingly. Currently, STI (shallow trench isolation, shallow trench isolation) is mostly used to implement isolation between devices. [0003] In the manufacture of CMOS image sensors, as the size of the pixel area decreases, the lining oxide layer in the STI cannot effectively block more and more charges from crossing, resulting in dark current at the charge escape interface, which affects the pixel quality. In order to reduce the influence of dark current on device performance, when forming STI, a lining silicon nitride layer is formed on the lining oxide layer, and the lining silicon nitride layer is used to absorb charges and prevent charge from escaping. [0004] However, wh...

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Problems solved by technology

[0004] However, when the substrate is etched to form a trench, a pad silicon nitride layer is formed on the surface of the substrate. The difference in etch rate of the silicon nitride layer will lead to over-etching of the lining silicon nitride layer, and a depression (divot) will be generated at the top corner of the shallow trench isolation, such as figure 1 shown

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