Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Method for fabricating shallow-trench isolation structure

A technology of isolation structure and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., and can solve problems such as deterioration, affecting isolation effect, and performance degradation of semiconductor devices

Active Publication Date: 2012-06-06
SEMICON MFG INT (SHANGHAI) CORP
View PDF1 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] However, in the above STI manufacturing method, weak point defects are often formed at the top edge of the trench of the formed STI structure, and the above wet etching process further deteriorates the weak point defects. , forming sunken defects such as Figure 5 shown in the edge area 25 shown in the
The recess defect will affect the isolation effect and lead to the degradation of the performance of the formed semiconductor device

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method for fabricating shallow-trench isolation structure
  • Method for fabricating shallow-trench isolation structure
  • Method for fabricating shallow-trench isolation structure

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0034] The specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0035] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, the present invention can be implemented in many other ways different from those described here, and those skilled in the art can make similar extensions without violating the connotation of the present invention, so the present invention is not limited by the specific implementations disclosed below.

[0036] Secondly, the present invention is described in detail using schematic diagrams. When describing the embodiments of the present invention in detail, for the convenience of explanation, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale, and the schematic diagram is only an example, and it should not be limited here. ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to a method for fabricating a shallow-trench isolation structure, which comprises the following steps: providing a semiconductor substrate in which a trench is formed; performing an oxygen plasma treating process at the trench top; after the oxygen plasma treating process is completed, performing a cleaning process to the trench to remove an oxide layer at the edge of the trench top; and after the cleaning process is completed, filling a dielectric material into the trench. The method can avoid or reduce the formation of defects at the edge of the trench top during the fabrication of the shallow-trench isolation structure.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a manufacturing method of a shallow trench isolation structure. Background technique [0002] With the continuous development of semiconductor integrated circuit manufacturing technology, the device-to-device isolation technology in the semiconductor integrated circuit manufacturing process has also developed from the original local oxidation of silicon (LOCOS) to shallow trench isolation technology. [0003] The shallow trench isolation structure is formed by first forming a trench on a semiconductor substrate, and then filling the trench with an insulating dielectric material. In the Chinese patent application document with publication number CN 1649122A, a manufacturing method of shallow trench isolation is disclosed. Figure 1 to Figure 5 It is a schematic cross-sectional view of the structure corresponding to each step of the manufacturing method of the s...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/762
Inventor 韩秋华杜珊珊黄怡赵林林
Owner SEMICON MFG INT (SHANGHAI) CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products