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A New Multi-channel High Voltage Sampling Circuit

A sampling circuit, high-voltage technology, applied in the direction of logic circuit connection/interface layout, etc., can solve the problems of not being able to withstand high voltage, low accuracy and reliability, damage of MN7, MN8, MN9 and MN10, and avoid leakage problems , improve reliability, and avoid device breakdown

Active Publication Date: 2022-02-08
无锡英迪芯微电子科技股份有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, when the circuit is actually working, if the input signal vin2 is high voltage, the source terminal voltages of MN7, MN8, MN9 and MN10 are all high voltage, and the gate terminal voltages of these MOS tubes are all 0, because the MOS tube of the high voltage integrated circuit Most of them are bcd technology, that is, for NMOS, the drain terminal can withstand high voltage relative to the gate terminal, but the source terminal can not withstand high voltage relative to the gate terminal, so MN7, MN8, MN9 and MN10 are often at risk of being damaged by high voltage
Therefore, it can be seen that the accuracy and reliability of the existing multi-channel high-voltage sampling circuit in the actual working process are not high

Method used

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  • A New Multi-channel High Voltage Sampling Circuit
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Embodiment Construction

[0020] The specific embodiments of the present invention will be further described below in conjunction with the accompanying drawings.

[0021] This application discloses a novel multi-channel high-voltage sampling circuit. The novel multi-channel high-voltage sampling circuit includes at least two sampling channels. For the signal to be sampled, the output terminals of each sampling channel are connected and used as the sampling output terminals of the novel multi-channel high-voltage sampling circuit. Please refer to Figure 4 In the circuit structure shown, two sampling channels are taken as an example. The input terminal of the first sampling channel is used as a sampling input terminal of a new multi-channel high-voltage sampling circuit to connect to the signal vin1 to be sampled, and the input terminal of the second sampling channel is used as a new multi-channel high-voltage sampling circuit. The other sampling input terminal of the high-voltage sampling circuit is c...

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Abstract

The invention discloses a novel multi-channel high-voltage sampling circuit, which relates to the technical field of electronic circuits. The circuit includes several parallel sampling channels, and each sampling channel is constructed based on four field effect tube groups, and each field effect tube group includes Two NMOS transistors whose source ends are connected, the drain ends of the two NMOS transistors are respectively used as the first end and the second end of the field effect transistor group, and the gate ends of the two NMOS transistors are connected and used as the third end of the field effect transistor group; Since each field effect transistor group is connected to the high-voltage signal to be sampled by the drain end of an NMOS transistor, it can avoid the breakdown of the device caused by the high voltage during use, thereby improving the reliability of the circuit. High pressure sampling in the field provides an effective solution.

Description

technical field [0001] The invention relates to the technical field of electronic circuits, in particular to a novel multi-channel high-voltage sampling circuit. Background technique [0002] High-voltage sampling circuits are widely used in the field of industrial semiconductors and automotive electronics semiconductors, especially multi-channel high-voltage sampling circuits have very important use value, but how to design high-voltage sampling circuits is one of the difficulties, especially multi-channel high-voltage sampling circuits Circuits are even more difficult. [0003] The circuit structure of the commonly used single-channel high-voltage sampling circuit on the market is as follows: figure 1 As shown, the corresponding control waveforms of each signal are as follows figure 2 As shown, the sampling principle is as follows: when clkp is high level, that is, vdd, the voltage of clkp_HV, that is, the gate terminal voltage of MOS transistor MN1 is vdd+vin, vin is t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K19/0175
CPCH03K19/0175
Inventor 费俊驰刘三味张军庄志伟
Owner 无锡英迪芯微电子科技股份有限公司