SoC dual-core system clock synchronization method and device

A system clock and clock synchronization technology, applied in the direction of generating/distributing signals, etc., can solve the problems of the impact of product punctuality accuracy and the inability of the management core to save the system clock, so as to avoid clock asynchrony and ensure punctuality accuracy.

Pending Publication Date: 2021-06-11
ELECTRIC POWER RESEARCH INSTITUTE, CHINA SOUTHERN POWER GRID CO LTD +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] This application provides a SoC dual-core system clock synchronization method and device, which is used to solve the technical problem in the prior art that the management core cannot save the system clock after the clock is restarted, which affects the punctuality of the product

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  • SoC dual-core system clock synchronization method and device
  • SoC dual-core system clock synchronization method and device
  • SoC dual-core system clock synchronization method and device

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Embodiment 1

[0040] For ease of understanding, see figure 1 , Embodiment 1 of a SoC dual-core system clock synchronization method provided by the present application includes:

[0041] Step 101 , when the real-time core enables interrupts, send the first system clock and verification information to the shared memory through the real-time core, and set a first clock synchronization flag at the same time.

[0042] Shared memory is a memory that both the real-time core and the management core can access. It can be set in advance as needed, and is mainly used to store information such as clocks and related signs during the clock synchronization process. The verification information not only includes the information obtained by checking the first system clock in real time, but also includes verification mode information, which is convenient for management and verification of anti-verification. The clock synchronization flag provides different states according to whether the synchronization is ...

Embodiment 2

[0051] For ease of understanding, see figure 2 , the present application provides a second embodiment of a SoC dual-core system clock synchronization method, including:

[0052] Step 201 , after the SoC dual-core system is powered on, perform initial system clock settings for the management core and the real-time core respectively.

[0053] The clock of the management core is mainly provided by the real-time core, and the initial system clock setting process is no exception. The clock of the real-time core is provided by the RTC chip. The real-time core can obtain clock data from the RCT chip, but if the acquisition fails, the management core Linux is used. The system clock in the kernel updates the clocks of the real-time kernel and the RTC chip at the same time.

[0054] Further, step 201 includes:

[0055] The RTC clock obtained on the RTC chip is sent to the shared memory through the real-time core, so that the management core performs the initial system clock setting a...

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Abstract

The invention discloses an SoC dual-core system clock synchronization method and device, and the method comprises the steps of transmitting a first system clock and verification information to a shared memory through a real-time core when the real-time core is opened and interrupted, and setting a first clock synchronization mark at the same time; when the management core detects that the first clock synchronization mark exists in the shared memory, obtaining a first system clock and verification information in the shared memory through the management core; and after the first system clock passes the anti-check according to the check information, updating the clock data of the management core by using the first system clock to realize clock synchronization. The technical problem that in the prior art, a management core cannot store a system clock after the clock is restarted, and consequently the punctuality precision of a product is affected can be solved.

Description

technical field [0001] The present application relates to the technical field of clock synchronization, in particular to a SoC dual-core system clock synchronization method and device. Background technique [0002] With the rapid development of the distribution network, there are more stringent requirements for the real-time detection ability of the operating equipment and the reliability of the protection automation equipment operation. The System on Chip (System on Chip) dual-core system integrates two ARM processors and FPGA , The data exchange is completed inside the chip, and the cooperative and efficient work can effectively improve the reliability of data exchange, reduce the complexity of the single board, and reduce power consumption. [0003] At present, most power distribution automation terminals use clock chips for clock keeping. The first dual-core core is the management core, which runs on the operating system and is responsible for data interaction with the m...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F1/12
CPCG06F1/12
Inventor 林跃欢刘胤良林心昊袁智勇雷金勇何思名徐全
Owner ELECTRIC POWER RESEARCH INSTITUTE, CHINA SOUTHERN POWER GRID CO LTD
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