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On-die static random access memory (SRAM) for caching logical-to-physical (L2P) tables

A flash memory, storage device technology, applied in the field of delayed systems

Active Publication Date: 2021-06-11
YANGTZE MEMORY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, reading and writing data efficiently and in a timely manner in memory devices is becoming increasingly challenging as smaller device sizes offer the benefit of dramatically improved storage capacity

Method used

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  • On-die static random access memory (SRAM) for caching logical-to-physical (L2P) tables
  • On-die static random access memory (SRAM) for caching logical-to-physical (L2P) tables
  • On-die static random access memory (SRAM) for caching logical-to-physical (L2P) tables

Examples

Experimental program
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Embodiment Construction

[0010] While specific configurations and arrangements are discussed, it should be understood that this is done for illustration purposes only. A person skilled in the relevant art will recognize that other configurations and arrangements can be used without departing from the spirit and scope of the present disclosure. It will be apparent to those skilled in the relevant art that the present disclosure may be used in various other applications as well.

[0011] Note that references in this specification to "one embodiment," "an embodiment," "exemplary embodiment," "some embodiments," etc., indicate that the described embodiments include a particular feature, structure, or characteristic, but each An embodiment may not necessarily include a specific feature, structure or characteristic. Furthermore, such phrases are not necessarily referring to the same embodiment. In addition, when a particular feature, structure or characteristic is described in conjunction with an embodime...

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PUM

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Abstract

The present disclosure describes methods and systems for reading data from a flash memory. A method may include receiving, by a flash memory controller, a read request for data stored in a plurality of flash memory dies. The read request includes a logical address of the data. Each of the plurality of flash memory dies includes one or more flash memory arrays and one or more on-die static random access memory (SRAM) memory devices. The method further includes identifying an on-die SRAM memory of the flash memory die containing logical-to-physical (L2P) information; and searching the L2P information to obtain a physical address of the data corresponding to the logical address. The method also includes retrieving data from a flash memory array of the flash memory die using the physical address.

Description

technical field [0001] The present disclosure relates generally to the field of flash memory, and more particularly, to systems and methods for reducing latency in the operation of flash memory devices. Background technique [0002] Memory cells have been scaled to smaller sizes through improvements in process technology, circuit design, programming algorithms, and manufacturing processes. In many servers and mobile devices, NAND flash memory, a non-volatile storage technology, is widely used as the main non-volatile storage device due to its high storage density and relatively low access latency. Three-dimensional (3D) NAND flash memory has been developed to further increase storage density and reduce manufacturing costs. However, reading and writing data efficiently and in a timely manner in memory devices is becoming increasingly challenging as smaller device sizes offer the benefit of dramatically improved storage capacity. Contents of the invention [0003] The pres...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/419
CPCG11C11/413G06F3/061G06F3/0688G06F3/064G06F12/0246G06F2212/1024G06F2212/7201G06F2212/7208G11C11/419G06F12/0653G06F3/0604G06F3/0659G06F3/0679G06F3/0673
Inventor K·胡
Owner YANGTZE MEMORY TECH CO LTD