Convolutional neural network acceleration system based on unstructured sparseness

A convolutional neural network and unstructured technology, applied in the field of accelerators, can solve the problems that accelerators cannot be effective and accelerated, and achieve the effects of reducing delay, flexible calculation process, and improving calculation efficiency

Pending Publication Date: 2021-07-23
南京风兴科技有限公司
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Problems solved by technology

[0004] This application provides an unstructured sparse convolutional neural network acceleration system to solve the problem that existing accelerators cannot achieve effective acceleration

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  • Convolutional neural network acceleration system based on unstructured sparseness
  • Convolutional neural network acceleration system based on unstructured sparseness
  • Convolutional neural network acceleration system based on unstructured sparseness

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Embodiment Construction

[0052]The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of this application.

[0053] The unstructured sparseness for DCNN has high hopes for hardware acceleration due to its large-scale compression of computational complexity. However, due to the high irregularity of the distribution of parameters after the unstructured sparse process, different problems will be introduced when implemented on general-purpose acceleration platforms (CPU, GPU) and dedicated acceleration platforms for dense neural networks: 1) processing unit ( processin...

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Abstract

The invention provides a convolutional neural network acceleration system based on unstructured sparse. The system comprises an off-chip storage and an acceleration device in network connection with the off-chip storage. The acceleration device comprises a bias cache region, a weight cache region, an activation cache region, a processing module, an input overlap region, a configurable accumulation module, a post-processing module and a top layer controller. In the application, the flexible network-on-chip is arranged between the cache region and the processing module, so that the calculation process in the scheme is more flexible. In addition, the configurable accumulation module can reduce the adder tree delay in the calculation process, and the calculation efficiency is improved.

Description

technical field [0001] The present application relates to the field of accelerator technology, in particular to an unstructured sparse convolutional neural network acceleration system. Background technique [0002] At present, DCNN (Deep convolutional neural networks, deep convolutional neural network) is widely used in many computer vision tasks, such as image classification and target recognition. In order to achieve better performance, the DCNN model tends to become wider and deeper, thus introducing a large increase in the number of parameters, making the computational complexity and storage requirements increase in large batches. Network compression techniques, such as pruning, can greatly reduce the computational complexity of models with acceptable accuracy. Pruning algorithms can be divided into two categories: structured sparse and unstructured sparse. Compared with structured sparseness, unstructured sparseness can achieve better compression efficiency with the s...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/15G06F7/498G06N3/04G06N3/063
CPCG06F17/153G06F7/4981G06N3/063G06N3/045
Inventor 谢逍如王丹阳王中风
Owner 南京风兴科技有限公司
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