Clock interruption detection and synchronization method for triple-redundancy computer and computer system

Abstract

The invention provides a triple-redundancy computer clock interruption detection and synchronization method and a computer system. The triple-redundancy computer clock interruption detection and synchronization method comprises the following steps: S1, controlling a clock source to generate a synchronization pulse; s2, detecting the pulse width and the period of the synchronization pulse, counting the pulse width and the period of the synchronization pulse, determining whether the synchronization pulse is in a normal state or not, and triggering the step S2 when the synchronization pulse is in the normal state; s3, each synchronization pulse is controlled to be interrupted to generate a plurality of periodic pulse signals; s4, setting three clock source selection configuration registers for synchronizing the periodic pulse signals so as to store flag bits corresponding to the periodic pulse signals; and S5, detecting the pulse width of the periodic pulse signal, judging whether the periodic pulse signal is in a normal state or not, and when the periodic pulse signal is in the normal state, providing a flag bit for the application software to read to serve as a source selection basis of the application software. According to the method, the software synchronization problem of the three-redundancy computer can be solved, and the synchronism and the reliability of redundant system software operation are improved.

Description

technical field [0001] The invention relates to a satellite-borne electronic computer and control technology, in particular to a triple-redundancy computer clock interruption detection and synchronization method and a computer system. Background technique [0002] Triple-redundant computers are the most commonly used architecture for high-reliability electronic systems today. Among them, synchronization is the core of the whole system, that is to say, the redundant modules must work in step with each other and complete a certain basic action of the same task at the same time at "a certain moment". The voting process of such a fault-tolerant system is meaningful, in order to ensure the principle of majority consistency of redundant modules in the system, and to shield the infringement of a small number of faults in the work; it is also possible to accurately switch faulty modules, realize structural reconstruction, and achieve a fault-tolerant system. continuous, correct and...

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Problems solved by technology

[0005]Aiming at the defects in the prior art, the purpose of the present invention is to provide a three-redundant computer clock interruption detection and synchronization method and computer system, which solves the three-redundant How does the computer select the correct clock source synchronization pulse from three independent clock sources to complete the software synchronization problem of the triple redundant computer

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