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A method of increasing the frequency of the chip's spi interface

A technology of SPI interface and frequency, which is applied in the direction of instrumentation, electrical digital data processing, etc., can solve the problem of low SPI clock frequency, achieve good flexibility, improve transmission efficiency, and increase the effect of clock frequency

Active Publication Date: 2022-03-25
ZHENGZHOU XINDA JIEAN INFORMATION TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Aiming at the problem that the clock frequency of the SPI of the current chip is low, the present invention provides a method for increasing the frequency of the SPI interface of the chip

Method used

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  • A method of increasing the frequency of the chip's spi interface
  • A method of increasing the frequency of the chip's spi interface
  • A method of increasing the frequency of the chip's spi interface

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Embodiment Construction

[0026] In order to make the purpose, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the present invention Examples, not all examples. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0027] figure 2 A flow chart of a method for increasing the frequency of the SPI interface of the chip is shown in the present invention. Such as figure 2 As shown, the method includes the following steps:

[0028] S101: respectively determine the setup time Tds, hold time Tdh and path delay Tdelay of the MISO signal of the SPI master;

[0029] The setup time (Tds) refers t...

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Abstract

The invention provides a method for increasing the frequency of the SPI interface of the chip. The method includes: step 1: respectively determine the setup time Tds, hold time Tdh, and path delay Tdelay of the MISO signal of the SPI master; The path delay Tdelay of the signal calculates the adjustable interval of the SPI clock frequency; Step 3: select a stable clock frequency in the adjustable interval of the SPI clock frequency to realize the efficient data transmission of the SPI interface. The SPI master device of the present invention delays the sampling clock to accurately sample the MISO signal, which can increase the clock frequency of the SPI and effectively improve the transmission efficiency of the SPI interface; at the same time, the SPI master device can adjust the number of delayed sampling clocks to adapt to SPI clocks of different frequencies , with good flexibility.

Description

technical field [0001] The invention relates to the technical field of SPI interface, in particular to a method for increasing the frequency of the SPI interface of a chip. Background technique [0002] The SPI interface is a full-duplex synchronous serial communication interface, which adopts the master-slave mode (Master-Slave) control mode, and the master device can control multiple slave devices by providing clock signals and performing chip selection on the slave devices. The slave device itself does not generate a clock signal, and its clock signal is provided by the master device. When CPHA is 1, the SPI interface protocol sends data on the front edge of the clock cycle, and collects data on the latter edge; the slave device uses the clock of the master device to return to MISO, such as figure 1 As shown, the SPI slave device starts to return data after seeing the falling edge of SCLK. Due to the path delay inside the chip, the master device sees the level inversion ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/42
CPCG06F13/4291
Inventor 苏庆会冯驰李银龙王斌王中原
Owner ZHENGZHOU XINDA JIEAN INFORMATION TECH