Semiconductor device and method of forming semiconductor device

Abstract

A semiconductor device includes a plurality of fin structures that each protrude vertically upwards out of a substrate and each extend in a first direction in a top view. A gate structure is disposed over the fin structures. The gate structure extends in a second direction in the top view. The second direction is different from the first direction. The fin structures have a fin pitch equal to a sum of: a dimension of one of the fin structures in the second direction and a distance between an adjacent pair of the fin structures in the second direction. An end segment of the gate structure extends beyond an edge of a closest one of the fin structures in the second direction. The end segment has a tapered profile in the top view or is at least 4 times as long as the fin pitch in the second direction. In accordance with other embodiments of the present application, a method of forming a semiconductor device is also provided.

Description

technical field [0001] Embodiments of the present application relate to semiconductor devices and methods of forming semiconductor devices. Background technique [0002] The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs, where each generation has smaller and more complex circuits than the previous generation. During IC evolution, functional density (ie, the number of interconnected devices per chip area) has generally increased while geometry size (ie, the smallest component (or line) that can be made using a fabrication process) has decreased. This downscaling process generally offers many benefits by increasing throughput efficiency and reducing associated costs. This scaling down process also increases the complexity of processing and manufacturing the IC. [0003] For example, performing the fabrication processes used to define the gate structures of trans...

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Problems solved by technology

As device dimensions continue to shrink, the risk of electrical shorts caused by such residues or by-products may also increase, which may result in reduced yield or poor device performance

[0004] Therefore, while conventional methods of forming gate structures are often adequate, they are not satisfactory in all respects

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