Resetting method of system

Abstract

A method of resetting a system enables an EEPROM writing to be implemented to the end normally, and it is capable of avoiding runaway of the whole system, even if reset signal is received because of a power failure while the EEPROM is in the writing state. In the system which has a CPU, an EEPROM whole circuit, an oscillation circuit, and a reset control circuit, when a system reset occurs, the method includes detecting a writing operation of the EEPROM cell, in cases where the EEPROM cell is implementing the writing operation, holding the reset of the EEPROM cell until the writing operation of the EEPROM cell is terminated, thus implementing the reset of at least the CPU.

Description

technical field [0001] The invention relates to a system reset method. In particular, the present invention relates to a system reset method, in which the reset operation is performed when an EEPROM (Electrically Erasable Programmable Read-Only Memory) is in a write state. Background technique [0002] FIG. 1 is a view showing a reset method in a conventional system (without a reset control circuit). The reset method shown in FIG. 1 includes an EEPROM full circuit 11 , an oscillation circuit 8 , a CPU 10 and a RESETN terminal 9 . [0003] The full EEPROM circuit 11 includes a ring oscillator 7 , a readout circuit 2 , an EEPROM unit 1 and a control circuit 12 . In addition, the control circuit 12 includes a charge pump 6 , a write time counter 5 , a write data latch 3 and a write operation status flag (Status flag-while writing) 4 . [0004] FIG. 2 is a timing diagram of the reset method in FIG. 1 . The operations described are performed with reference to FIGS. 1 and 2 . ...

AI Technical Summary

Problems solved by technology

Thus there is a problem that there is a danger that the entire system will be out of control

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