Roller Arbitration Method and Circuit for On-Chip Data Exchange

Abstract

The invention discloses a roller arbitration method for on-chip data exchange, which is based on an NxN crossover network with N input ports and N output ports, comprising the following steps: S1, determining a priority arbitration arrangement; S2, judging whether each expected transmission pair in the arrangement has transmission demand, if yes, it is determined as the actual transmission pair, and the determined actual transmission pair immediately transmits data; otherwise, it is determined as a non-transmission pair; S3, perform sequential row / column or column / row arbitration, and select the switching point with high priority as the actual Transmission pair; S4, after the polling in step S3 is completed, the priority arbitration arrangement is scrolled to obtain a new arbitration arrangement; S5, S2-S4 is performed in a loop. This method can improve the efficiency and speed of on-chip data exchange, and is especially suitable for artificial intelligence and big data processing chips, especially chips with SIMT architecture. Such methods pertain to chip design, network-on-chip, system-on-chip, and computer architecture.

Description

technical field [0001] The invention relates to the fields of chip design, on-chip network, on-chip system, and computer architecture, in particular to a wheel scheduling method and circuit realization of an on-chip data exchange network. This method can improve the efficiency and speed of on-chip data exchange, and is especially suitable for artificial intelligence and big data processing chips, especially chips with SIMT architecture. Background technique [0002] Machine learning, scientific computing and graphics rendering require huge computing power, which is generally provided by large chips (such as GPU, TPU, APU, etc.) to achieve highly complex machine learning tasks and graphics processing tasks. Using machine learning to do recognition requires a huge Deep Learning network and massive image data, and the training process is very time-consuming; in a 3D application or game scene, if Recursive Ray-Tracing is used for rendering, and the scene If it is complex, it ne...

AI Technical Summary

Problems solved by technology

[0006] Among them, PIM has fairness and complexity problems because each selection is random and requires three steps.

[0007] However, RRM and iSLIP use priority round-robin arbitration, which is simpler than random arbitration logic. iSLIP has improved the grant pointer jump condition, and the fairness has been improved. However, three steps are still required, which makes the complexity problem also exist. Difficult to implement high-speed circuits

[0008] DRRM has two independent polling arbitration mechanisms for the input and output, which is shorter than the arbitration time of the iSLIP scheme, and at the same time achieves performance equivalent to iSLIP; on the basis of DRRM, GA sends the Grant information of the output port to the input port, although the arbitration efficiency is improved but the complexity increases more than DRRM

Since the complexity increases exponentially (N3logN) as the port increases, it is difficult for DDRM and GA to achieve more than two iterative arbitrations on high-speed circuits as the port increases

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