Backlight multi-partition brightness statistical method and device based on FPGA

A statistical method and multi-partition technology, applied to static indicators, instruments, etc., can solve problems such as high investment and low return, hinder product promotion, and high chip prices, and achieve reduced logic resource consumption, flexible software upgrades, and high interface versatility Effect

Active Publication Date: 2021-10-29
深圳市视显光电技术有限公司
View PDF5 Cites 2 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] At present, almost all FPGA solutions are adopted for high partition backlight algorithm control in the market, mainly because of the high cost of chip tape-out, but the current demand for high-end models in the market has not yet reached the million-level consumption, which is in a state of high investment and low return. At the same time, the high chip price also hinders the promotion of the product; however, FPGA has high flexibility and strong parallel processing ability to adapt to different partition scenarios, and at the same time, it uses the built-in Transceiver high-speed serial transceiver in FPGA to realize V-By-One image transmission , so as to realize the perfect docking and interconnection with the TV motherboard and TCON board
[0005] As the number of backlight partitions increases, the traditional backlight multi-partition statistical method takes up more and more resources. It must be implemented with a larger FPGA, which is not conducive to cost control.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Backlight multi-partition brightness statistical method and device based on FPGA
  • Backlight multi-partition brightness statistical method and device based on FPGA
  • Backlight multi-partition brightness statistical method and device based on FPGA

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0037] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some of the embodiments of the present invention, but not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0038] It should be understood that when used in this specification and the appended claims, the terms "comprising" and "comprises" indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude one or Presence or addition of multiple other features, integers, steps, operations, elements, components and / or collections thereof.

[0039] It should also be understood that the terminology used ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention relates to a backlight multi-partition brightness statistical method and device based on an FPGA. The statistical method comprises the following steps: acquiring V-By-One signal input; recovering line and field synchronization according to the V-By-One signal, recovering a data effective signal and recovering pixel data; processing the line-field synchronization, the data effective signal and the pixel data to obtain a brightness result; carrying out pixel data compensation correction and brightness result processing according to the brightness result; packaging the pixel data after line and field synchronization and compensation, and outputting a V-By-One signal; and sending the processed brightness result to a backlight control panel to realize backlight brightness control. According to the invention, the logic resource consumption of the FPGA on the partition backlight control mainboard can be greatly reduced, and tens of thousands of partition backlight processing can be effectively met; in addition, according to the method, the overall cost of the multi-partition backlight television is reduced, software upgrading is flexible, the interface universality is high, and the multi-partition backlight television can be in adaptive butt joint with different types of 4K / 8K mainboards.

Description

technical field [0001] The present invention relates to the technical field of backlight multi-region luminance statistics, in particular to an FPGA-based method and device for backlight multi-region luminance statistics. Background technique [0002] At present, high resolution / high frame rate and high dynamic range (HDR) have become the performance indicators that manufacturers in the field of video display are scrambling to chase. Backlight is an important part of the LCD display principle. For the most part, Local Dimming can achieve precise control of the backlight of each frame image area, reduce TV power consumption, greatly improve the contrast of TV display images, and achieve shocking terminal HDR display effects. The number of partitions has increased from dozens of before When it develops to mini LED, it can be used in large-size 4K / 8K TVs ranging from hundreds to tens of thousands of partitions. Such a large number of partitioned backlights poses a very high ch...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): G09G3/34G09G3/32
CPCG09G3/342G09G3/32
Inventor 张朝春费明
Owner 深圳市视显光电技术有限公司
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products