Sigma delta type ADC current sampling control method and device
A current sampling and control method technology, which is applied in the control of electromechanical transmission devices, motor generator control, electronic commutation motor control, etc., can solve the problems of PWM switching noise interference, complex tune-out circuits, and low precision, and achieve reduction effect of influence
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment 1
[0059] An embodiment of the present invention, a ΣΔ ADC current sampling control method, such as figure 1 shown, including:
[0060] S100 generates a PWM synchronous signal based on the PWM switch.
[0061] Specifically, the synchronous signal generated by PWM is used to generate the enable control signal of the post-stage data filter (SINC filter) of the Σ-ΔADC.
[0062] S200 Using the PWM period of the PWM synchronization signal and the structural parameters corresponding to the filters of different orders, calculate the delay time of the filter enable signals corresponding to the filters of different orders, so as to generate the corresponding filter enable signals.
[0063] In this embodiment, the filter enable signal is used to switch the continuous operation mode to the intermittent operation model, and the phase is adjusted to avoid the moment after the PWM is turned on, reducing the influence of the system PWM switching noise on the current sampling
[0064] S300 con...
Embodiment 2
[0069] Based on the above-mentioned embodiment, the parts that are the same as those in the above-mentioned embodiment in this embodiment will not be repeated one by one. This embodiment provides a ΣΔ ADC current sampling control method, which specifically includes:
[0070] S100 generates a PWM synchronous signal based on the PWM switch.
[0071] Specifically, the synchronous signal generated by PWM is used to generate the enable control signal of the post-stage data filter (SINC filter) of the Σ-ΔADC.
[0072] In step S200, the delay time of the filter enable signal corresponding to the filter of different order is calculated by using the PWM period of the PWM synchronization signal and the structural parameters corresponding to the filter of different order to generate the corresponding filter enable signal. capable signals, including:
[0073] The rising edge signal and falling edge signal of the PWM synchronous signal are extracted to generate a first pulse signal and a ...
Embodiment 3
[0103] Based on the above-mentioned embodiment, the parts that are the same as those in the above-mentioned embodiment in this embodiment will not be repeated one by one. This embodiment provides a ΣΔ ADC current sampling control device, such as figure 2 , 5 shown, including:
[0104] PWM synchronous signal generation module 100, for generating PWM synchronous signal based on PWM switch;
[0105] The filter enable signal module 200 is used to calculate the delay time of the filter enable signal corresponding to the filter of the different order by using the PWM period of the PWM synchronous signal and the structural parameters corresponding to the filters of different orders, to generate a corresponding filter enable signal;
[0106] The sampling module 300 is configured to control the corresponding filter to start and stop through the filter enable signal, so as to control the ΣΔ ADC to perform current sampling.
[0107] Preferably, the filtering enable signal module is a...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 


