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Clock frequency division module, audio playing and stopping controllable digital-to-analog conversion circuit and method

A digital-to-analog conversion circuit, clock frequency division technology, applied in digital memory information, information storage, static memory and other directions, can solve the problems of inability to realize broadcast pause and restart, popping sound, lack of judgment means, etc., to reduce hardware area and Design complexity, address stringent constraints, application and design flexibility effects

Pending Publication Date: 2021-11-30
AMICRO SEMICON CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For this type of DAC, if the DAC enable is turned off and turned on directly, it will appear during the period from the DAC enable turn off to on. Due to the lack of judgment means, it is impossible to know that the CIC filter (integral-cascaded-comb filter) is interpolated Several data, resulting in re-interpolation after opening, resulting in data calculation overflow error, popping sound phenomenon, so that the application cannot realize the suspension and restart of this kind of DAC broadcasting

Method used

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  • Clock frequency division module, audio playing and stopping controllable digital-to-analog conversion circuit and method
  • Clock frequency division module, audio playing and stopping controllable digital-to-analog conversion circuit and method
  • Clock frequency division module, audio playing and stopping controllable digital-to-analog conversion circuit and method

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Embodiment Construction

[0023]The technical solutions in the embodiments of the present invention will be described in detail below with reference to the drawings in the embodiments of the present invention. It should be understood that the specific embodiments described below are only used to explain the present invention, not to limit the present invention. It should be noted by those skilled in the art that the modules, sub-modules, controllers, and systems disclosed in the present invention can be designed using hardware description languages ​​such as VHDL or Verilog if there is no contradiction, and can be mapped to form a Netlist information for manufacturing integrated circuits.

[0024] In the following description, specific details are given to provide a thorough understanding of the embodiments. However, one of ordinary skill in the art would understand that the embodiments may be practiced without these specific details. For example, circuits may be shown in block diagrams in order not ...

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Abstract

The invention discloses a clock frequency division module, an audio playing and stopping controllable digital-to-analog conversion circuit and an audio playing and stopping controllable digital-to-analog conversion method, which adopt a new audio DAC architecture, optimize a large amount of multiplication and addition operations, combinational logic and registers in the traditional architecture, and greatly reduce the hardware area and the design complexity; meanwhile, the limitation of strict requirements on the working clock frequency of the audio DAC circuit is solved, audios with different sampling rates can be supported, and application and design are more flexible; in addition, the circuit also has the function of delaying to close work enabling, so that when the circuit is closed to be opened again, the CIC filter can correctly carry out interpolation, the sonic boom phenomenon is avoided, and if the delay is not carried out, the pause and playing of the audio cannot be normally controlled.

Description

technical field [0001] The invention relates to the field of DAC digital circuits, in particular to a clock frequency division module, a digital-to-analog conversion circuit with controllable audio playback and stop, and a method. Background technique [0002] In general, there is little need to pause DAC (digital-to-analog converter) broadcasting in simple audio playback applications such as sweepers, but if the function of re-opening and continuing broadcasting after such DAC broadcasting is paused, it will make DAC available in various devices. And more flexible in different scenarios, making it more widely used. For this type of DAC, if the DAC enable is turned off and turned on directly, it will appear during the period from the DAC enable turn off to on. Due to the lack of judgment means, it is impossible to know that the CIC filter (integral-cascaded-comb filter) is interpolated Several data, resulting in re-interpolation after opening, resulting in data calculation ...

Claims

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Application Information

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IPC IPC(8): G11C7/06G11C7/08
CPCG11C7/06G11C7/08
Inventor 王莉莉何再生
Owner AMICRO SEMICON CORP
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