Method for forming alignment mark
A technology for aligning marks and aligning patterns, which is applied in electrical components, electrical solid-state devices, circuits, etc., can solve the problems of low identification accuracy of quasi-marks, and achieves improved accuracy and clarity, improved yield, and improved performance. Effect
Pending Publication Date: 2021-11-30
YANGTZE MEMORY TECH CO LTD
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Problems solved by technology
[0006] The invention provides a method for forming an alignment mark, which is used to solve the problem of low recognition accuracy of the alignment mark in the prior art, so as to improve the yield rate of semiconductor products
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[0063] The specific implementation of the method for forming the alignment mark provided by the present invention will be described in detail below with reference to the accompanying drawings.
[0064] During the wafer bonding process, in order to ensure the alignment between two wafers, the wafer needs to be positioned by identifying the alignment marks on the wafer. However, when the wafer is irradiated with light of a specific wavelength, the pattern of the alignment mark is blurred due to the low light-dark contrast between the alignment mark and the dielectric layer around the alignment mark. Accurate recognition of the alignment marks reduces the accuracy of wafer positioning and affects the final wafer bonding effect and the yield of semiconductor products.
[0065] This specific embodiment provides a method for forming an alignment mark, with figure 1 It is a flowchart of a method for forming an alignment mark in a specific embodiment of the present invention, with ...
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The invention relates to a method for forming an alignment mark. The method comprises the following steps that an alignment pattern and a dielectric layer distributed around the periphery of the alignment pattern are formed, the alignment pattern comprises a plurality of first repeated structure units arranged periodically, and the first repeated structure units are used for increasing the reflectivity difference between the alignment pattern and the dielectric layer; the alignment reflectivity of the alignment pattern and the dielectric reflectivity of the dielectric layer is obtained; and whether a difference value between the alignment reflectivity and the dielectric reflectivity is higher than a preset value or not is determined, and if yes, the alignment pattern is used as the alignment mark. According to the invention, a relatively high reflectivity difference between the finally obtained alignment mark and the dielectric layer is ensured, the light and shade contrast between the alignment mark and the dielectric layer is increased, and the accuracy and definition of alignment mark identification can be improved.
Description
technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming an alignment mark. Background technique [0002] With the development of planar flash memory, the production process of semiconductors has made great progress. However, in recent years, the development of planar flash memory has encountered various challenges: physical limits, existing development technology limits, and storage electron density limits. In this context, in order to solve the difficulties encountered in planar flash memory and pursue lower production costs per unit storage unit, various three-dimensional (3D) flash memory structures have emerged, such as 3D NOR (3D or not) flash memory and 3D NAND (3D NAND) flash memory. [0003] Among them, 3D NAND memory takes its small size and large capacity as the starting point, and the design concept of highly integrated storage units stacked in three-dimensional mode is to produce ...
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Patent Timeline
Login to View More IPC IPC(8): H01L23/544H01L27/11524H01L27/11551H01L27/1157H01L27/11578
CPCH01L23/544H01L2223/54426H10B41/35H10B41/20H10B43/35H10B43/20
Inventor 王思聪于洪浩
Owner YANGTZE MEMORY TECH CO LTD