PCIE bus addressing method and device

Abstract

The invention discloses a PCIE bus addressing method and device. The method comprises the following steps: inserting a PCIE daughter board into a slot position in a PCIE bus backboard; when the PCIE daughter board is powered on and started, reading slot position information of a slot position where the PCIE daughter board is located, and writing the slot position information into a slot position information register of the PCIE daughter board; when an RC node in the PCIE bus is started, traversing a PCIE address corresponding to the PCIE daughter board, and reading slot position information of a slot position information register in the PCIE daughter board; and enabling the RC node to associate the slot position information of the PCIE daughter boards with the corresponding PCIE addresses, and generainge an information association data table of the slot position information of the PCIE daughter boards and the PCIE addresses. According to the method and the device, effective association between the slot position information of the PCIE daughter board and the PCIE address is realized, no matter how many devices exist on the PCIE bus and what changes of device configuration exist, an application programmer can obtain the PCIE address information of the PCIE daughter board through the slot position information, so that the purpose of performing PCIE daughter board addressing through the slot position information is realized, and application programming aiming at the slot position is conveniently realized.

Description

technical field [0001] The invention belongs to the field of electronic technology, and in particular relates to a PCIE bus addressing method and device. Background technique [0002] PCIE, short for baiperipheral component interconnect express, is a high-speed serial computer expansion bus standard. PCIE belongs to high-speed serial point-to-point dual-channel high-bandwidth transmission, and the connected devices allocate exclusive channel bandwidth and do not share bus bandwidth. PCIE devices communicate through logical connections called interconnects or links. A link is a point-to-point communication channel between two PCI Express ports, allowing them to send and receive normal PCI requests and interrupts. [0003] With the development of industrial control equipment for high-speed data exchange and the maturity of PCIE bus technology, PCIE bus is introduced into the design of industrial control equipment as an ultra-high-speed communication bus, such as using PCIE b...

AI Technical Summary

Problems solved by technology

However, some characteristics of the PCIE bus, such as device address allocation and device address addressing, are different from traditional industrial control equipment, which brings inconvenience to the programming and application of industrial control equipment.

The PCIE bus is a plug-and-play bus. When adding a PCIE node or reducing a PCIE node, the PCIE address of each node on the PCIE bus may change. Different interface configurations and programming are performed according to the board slot number. In the control protection device, this kind of address change often causes great troubles to application programmers, and it is impossible to directly associate the PCIE address with the actual physical slot of the board

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