Various embodiments include techniques for performing memory operations in a computing
system. A
processing unit in the computing
system performs memory operations by accessing memory using two concurrent
memory address maps (AMAPs). The
processing unit access memory via a first fine-grain distributed AMAP in order to access memory with high-bandwidth without imposing strict ordering of memory operations. The
processing unit access memory via a second AMAP source-ordered non-distributed AMAP in order to access memory where memory synchronization latency is more important than
memory bandwidth. By accessing memory via the two concurrent AMAPs, the processing unit can select between high-bandwidth memory access and source-ordered memory access interchangeably, depending on which is desired for each
memory operation. Further, the fine-grain distributed AMAP and the source-ordered non-distributed AMAP can maintain synchronization and coherency between one another concurrently without
software intervention, thereby alleviating the burden on the
application programmer to manage the two AMAPs.