Convolution operation device and method, electronic equipment and medium

A technology of convolution operation and addition operation, which is applied in the field of convolution operation devices, can solve the problem of sacrificing structural flexibility and output speed of calculation results, and achieve the effects of avoiding repeated reading, reducing memory access, and reducing energy consumption

Pending Publication Date: 2022-01-25
EHIWAY MICROELECTRONIC SCI & TECH SUZHOU CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In some optimized matrix convolution computing structures, although the multiplexing of input data is realized through structural innovation, there is still a certain degree of repeated reading of input data.
In contrast, there are some optimized matrix convolution calculation structures. Although the repeated reading of input matrix data is avoided, the flexibility of the structure and the output speed of the calculation results are sacrificed.

Method used

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  • Convolution operation device and method, electronic equipment and medium
  • Convolution operation device and method, electronic equipment and medium
  • Convolution operation device and method, electronic equipment and medium

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Embodiment Construction

[0033] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. It should be understood, however, that these descriptions are exemplary only, and are not intended to limit the scope of the present disclosure. In the following detailed description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the embodiments of the present disclosure. It may be evident, however, that one or more embodiments may be practiced without these specific details. Also, in the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concepts of the present disclosure.

[0034] The terminology used herein is for the purpose of describing particular embodiments only, and is not intended to be limiting of the invention. The terms "comprising", "comprising", etc. used herein indicate the presence of stated features, steps, o...

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Abstract

The invention provides a convolution operation device, which is used for carrying out convolution operation on an input matrix and a weight matrix, and comprises: horizontal data processing modules, which are used for converting the sequence of row data of the input matrix so as to realize the sharing of the read row data, where one horizontal data processing module is used for processing one row of row data; the vertical data processing module that is used for carrying out multiplication operation on the weight matrix and the matrix data output by the horizontal data processing module, carrying out cross addition operation on a multiplication operation result and carrying out accumulation operation on a cross addition operation result to obtain a convolution operation result of the input matrix, wherein the vertical data processing module comprises a plurality of inputs, and each input is connected to the output of one horizontal data processing module. The invention further provides a convolution operation method, electronic equipment and a computer readable storage medium.

Description

technical field [0001] The present disclosure relates to the field of convolutional neural network hardware acceleration, and in particular to a convolution operation device, method, electronic equipment and media. Background technique [0002] Convolutional Neural Networks (CNN) is one of the representative algorithms of deep learning. Because of its excellent performance in the field of artificial intelligence, CNN has been widely concerned and applied to high-tech applications such as image classification, speech recognition, face recognition, automatic driving, and medical imaging. At present, CNN structures with excellent performance such as AlexNet, VGG, and ResNet have emerged. With the continuous development of CNN, the network structure becomes increasingly complex and the number of parameters explodes, posing new challenges to the design of CNN hardware accelerators. [0003] Due to the excellent flexible programming and outstanding performance-to-power ratio of ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/16G06F17/15G06N3/04
CPCG06F17/16G06F17/153G06N3/045
Inventor 屈心媛黄志洪蔡刚方震
Owner EHIWAY MICROELECTRONIC SCI & TECH SUZHOU CO LTD
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