Semiconductor packaging device and manufacturing method thereof
A packaging device and semiconductor technology, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve problems such as welding failure and easy deviation
Pending Publication Date: 2022-02-15
ADVANCED SEMICON ENG INC
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Problems solved by technology
[0002] Existing packaging structures, such as FOCoS (Fan Out Chip on Substrate, fan-out electronic components on substrate) packaging structure, ASIC (Application Specific Integrated Circuit, application specific integrated circuit) electronic components and HBM (High Bandwidth Memory, high bandwidth memory) Electronic components are prone to offset problems during the FCB (Flip Chip Bonding, flip-chip electronic component welding) process, which often leads to non-joint phenomenon at the metal bump in the low-density input-output I / O area
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[0036] The specific implementation manners of the present disclosure will be described below in conjunction with the accompanying drawings and examples. Those skilled in the art can easily understand the technical problems solved by the present disclosure and the technical effects produced through the contents recorded in this specification. It should be understood that the specific embodiments described here are only used to explain related inventions, rather than to limit the invention. In addition, for the convenience of description, only the parts related to the related invention are shown in the drawings.
[0037] It should be noted that the structures, proportions, sizes, etc. shown in the accompanying drawings of the specification are only used to match the content recorded in the specification for the understanding and reading of those skilled in the art, and are not intended to limit the implementation of the present disclosure. There are limited conditions, so it has...
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The invention relates to a semiconductor packaging device and a manufacturing method thereof. The semiconductor packaging device includes: a bridging rewiring layer including a high-density line region and a low-density line region, a first electronic element and a second electronic element ; the first electronic element is arranged below the bridging rewiring layer, the active surface of the first electronic element is provided with a first high-density input-output I / O region and a first low-density I / O region, the first high-density I / O region is electrically connected with a high-density circuit region, and the first low-density I / O region is electrically connected with a low-density circuit region through routing; and the second electronic element is arranged adjacent to the first electronic element, the active surface of the second electronic element is provided with a second high-density I / O region and a second low-density I / O region, and the second high-density I / O region is electrically connected with the high-density circuit region.
Description
technical field [0001] The present disclosure relates to the technical field of semiconductor packaging, in particular to a semiconductor packaging device and a manufacturing method thereof. Background technique [0002] Existing packaging structures, such as FOCoS (Fan Out Chip on Substrate, fan-out electronic components on substrate) packaging structure, ASIC (Application Specific Integrated Circuit, application specific integrated circuit) electronic components and HBM (High Bandwidth Memory, high bandwidth memory) Electronic components are prone to offset problems during the FCB (Flip Chip Bonding, flip-chip electronic component welding) process, which often leads to non-joint phenomenon at the metal bump in the low-density input-output I / O area . Contents of the invention [0003] The present disclosure provides a semiconductor package device and a manufacturing method thereof. [0004] In a first aspect, the present disclosure provides a semiconductor packaging dev...
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IPC IPC(8): H01L23/498H01L23/49H01L25/18H01L21/60
CPCH01L23/49838H01L25/18H01L24/48H01L24/85H01L24/03H01L2224/48091H01L2224/48177H01L2224/48179H01L2224/0231H01L2224/0233H01L2224/02381H01L2224/02379H01L2224/4824
Inventor 吕文隆
Owner ADVANCED SEMICON ENG INC