Power conversion apparatus and driving method for power conversion apparatus
A power conversion device and potential technology, applied in the direction of output power conversion device, AC motor control, irreversible DC power input conversion to AC power output, etc., can solve the problem of slow switching speed, residual low harmonics of output voltage, Problems such as the inability to increase the PWM carrier frequency to achieve the effect of suppressing the expansion of the voltage difference and suppressing harmonics
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Embodiment approach 2
[0102] In the case of calculating the switching pattern based on the method described in Patent Document 1 using Equation (4), the degree of freedom is determined according to the number of switching phases. Therefore, in order to add expressions that satisfy conditions such as the difference in phase width of the switching phase interval that affects the capacitor voltage difference Vdiff, it is necessary to provide a degree of freedom to the added conditions. As a result, the formulas that originally define the amplitude of the fundamental wave or the harmonic components have to be relaxed, and there is a problem that the range in which the harmonics can be reduced is narrowed.
[0103] Therefore, in Embodiment 2, in order to obtain a switching pattern in which the difference in phase width between the switching phase interval in which the capacitor voltage difference Vdiff increases and the switching phase interval in which it decreases is small, the voltage of the positive ...
Embodiment approach 3
[0135] In Embodiment 1 and Embodiment 2, the low-order harmonics in a five-level inverter that outputs five-level PWM by connecting three-level switching pins in series two by two in each phase are described. It is a method to reduce the PWM and determine the switching phase that the capacitor voltage difference on the DC input side is not easy to expand when the load is running. The same method can also be applied to an inverter.
[0136] exist Figure 21 In the figure, the circuit configuration of a three-level inverter is shown as the power conversion device according to the third embodiment. Different from the five-level inverter, there is one DC power supply 1, and the three-level switching pins of each phase are respectively connected to one DC input in each phase. When the neutral point current ic flows at the C potential after any one of the three-phase switching circuits outputs the C potential as in the five-level inverter, the positive side capacitor 5a or the neg...
Embodiment approach 4
[0141] The PWM generation method for adjusting the switching phase interval in order to reduce the low-order harmonics and balance the voltage of the positive-side capacitor and the voltage of the negative-side capacitor can also be used in Embodiment 1 or Embodiment 2. The low-order harmonic reduction PWM switching pattern calculated by the method described in , for example, the switching pattern of formula (3) is implemented by modifying it. In the capacitor voltage difference correction control for balancing the voltage of the positive-side capacitor and the voltage of the negative-side capacitor, the conventional phase correction that takes into account the unbalance of the positive-side capacitor voltage and the negative-side capacitor voltage is not performed. The switching phase to be corrected is selected based on the difference in phase width of the switching phase interval in which the capacitor voltage difference increases and decreases, the harmonics, and the power ...
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